SWRA751 September   2022

 

  1.   Introduction
  2.   Trademarks
  3. 1Command Packet
  4. 2Event Packet
  5. 3HCI Commands
    1. 3.1 HCI Commands List Format
    2. 3.2 Support HCI Commands Detailed Description
      1. 3.2.1  HCI_VS_Write_BD_Addr (0xFC06)
      2. 3.2.2  HCI_VS_Write_CODEC_Config (0xFD06)
      3. 3.2.3  HCI_VS_Write_CODEC_Config_Enhanced (0xFD07)
      4. 3.2.4  HCI_VS_DRP_Read_BER_Meter_Result (0xFD13)
      5. 3.2.5  HCI_VS_DRPb_Tester_Con_RX (0xFD17)
      6. 3.2.6  HCI_VS_LE_Enable (0xFD5B)
      7. 3.2.7  HCI_VS_Set_LE_Test_Mode_Parameters (0xFD77)
      8. 3.2.8  HCI_VS_DRPb_Enable_RF_Calibration (0xFD80)
      9. 3.2.9  HCI_VS_DRPb_Tester_Con_TX (0xFD84)
      10. 3.2.10 HCI_VS_DRPb_Tester_Packet_TX_RX (0xFD85)
      11. 3.2.11 HCI_VS_DRPb_Reset (0xFD88)
      12. 3.2.12 HCI_VS_DRPb_BER_Meter_Start (0xFD8B)
      13. 3.2.13 HCI VS LE Read Ber Test Results (0xFDAE)
      14. 3.2.14 HCI_VS_Read_RSSI (0xFDFC)
      15. 3.2.15 HCI_VS_Write_SCO_Configuration (0xFE10)
      16. 3.2.16 HCI_VS_Set_Pcm_Loopback_Enable (0xFE28)
      17. 3.2.17 HCI_VS_Read_Hardware_Register (0xFF00)
      18. 3.2.18 HCI_VS_Write_Hardware_Register (0xFF01)
      19. 3.2.19 HCI_VS_Update_UART_HCI_Baudrate (0xFF36)
      20. 3.2.20 HCI_VS_Set_Supported_Features (0xFF26)
      21. 3.2.21 HCI_VS_HCILL_Parameters (0xFD2B)
      22. 3.2.22 HCI_VS_Sleep_Mode_Configurations (0xFD0C)
      23. 3.2.23 HCI_VS_Get_System_Status (0xFE1F)
      24. 3.2.24 HCI_VS_Read_Patch_Version (0xFF22)
      25. 3.2.25 HCI_VS_DRPb_Set_Power_Vector (0xFD82)
      26. 3.2.26 HCI_VS_DRPb_Set_Class2_Single_Power (0xFD87)
      27. 3.2.27 HCI_VS_LE_Output_Power (0xFDDD)
      28. 3.2.28 HCI_VS_A3DP_Codec_Configuration (0xFD8E)
      29. 3.2.29 HCI_VS_AVPR_Enable (0xFD92)
      30. 3.2.30 HCI_VS_A3DP_Open_Stream (0xFD8C)
      31. 3.2.31 HCI_VS_A3DP_Close_Stream (0xFD8D)
      32. 3.2.32 HCI_VS_A3DP_Start_Stream (0xFD8F)
      33. 3.2.33 HCI_VS_A3DP_Stop_Stream (0xFD90)
      34. 3.2.34 HCI_VS_A3DP_Sink_Codec_Configuration (0xFD9C)
      35. 3.2.35 HCI_VS_A3DP_Sink_Open_Stream (0xFD9A)
      36. 3.2.36 HCI_VS_A3DP_Sink_Close_Stream (0xFD9B)
      37. 3.2.37 HCI_VS_A3DP_Sink_Start_Stream (0xFD9D)
      38. 3.2.38 HCI_VS_A3DP_Sink_Stop_Stream (0xFD9E)
      39. 3.2.39 HCI_VS_WBS_Associate (0xFD78)
      40. 3.2.40 HCI_VS_WBS_Disassociate (0xFD79)
  6. 4General Hardware Errors
  7. 5Revision History

3.2.29 HCI_VS_AVPR_Enable (0xFD92)

Description:

This command is used to enable the AVPR features:

  • A3PD SRC, WBS, FM converter.
  • A3PD SNK, WBS, FM converter.

It is recommended that the AVPR would be disabled once not used, for current consumption reduction. The default AVPR state is disabled.

Table 3-57 Command Parameters HCI_VS_AVPR_Enable (0xFD92) Enable/disable AVPR, A3DP Role, Upload code, Reserved
Command Parameter Size (bytes) Value Description
Enable/disable AVPR 1 0x0 - 0x1 Enable/disable the AVPR clock. Enable also reloads the AVPR code.1 - Enable0 - Disable
A3DP Role 1 0x0 - 0x1 0 – A3DP functional as source1 – A3DP functional as sink
Upload code 1 0x0 – 0x1 0 – Do not load A3DP code.1 – Load A3DP code.
Reserved 2 For future use
Table 3-58 Return Parameters
Returned Value Description Size (bytes) Events Generated
0x00
0x01 – 0xFF		 Command succeeded.
Command failed.		 1 Command Complete