ZHCSNF1 February   2021 BQ25960

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Charging System
      2. 9.3.2  Battery Charging Profile
      3. 9.3.3  Device Power Up
      4. 9.3.4  Device HIZ State
      5. 9.3.5  Dual Input Bi-Directional Power Path Management
        1. 9.3.5.1 ACDRV Turn-On Condition
        2. 9.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 9.3.5.3 Single Input with ACFET1
        4. 9.3.5.4 Dual Input with ACFET1-RBFET1
        5. 9.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 9.3.5.6 OTG and Reverse TX Mode Operation
      6. 9.3.6  Bypass Mode Operation
      7. 9.3.7  Charging Start-Up
      8. 9.3.8  Adapter Removal
      9. 9.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 9.3.10 Device Modes and Protection Status
        1. 9.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 9.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 9.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 9.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 9.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 9.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 9.4 Programming
      1. 9.4.1 F/S Mode Protocol
    5. 9.5 Register Maps
      1. 9.5.1 I2C Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Standalone Application Information (for use with main charger)
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 第三方产品免责声明
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 接收文档更新通知
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 静电放电警告
    7. 13.7 术语表
  14. 14Mechanical, Packaging, and Orderable Information

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订购信息

9.3.9 Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback

The integrated 16-bit ADC of the device allows the user to get critical system information for optimizing the behavior of the charger control. The control of the ADC is done through the ADC control register. The ADC_EN bit provides the ability to enable and disable the ADC to conserve power. The ADC_RATE bit allows continuous conversion or one-shot behavior. The ADC_AVG bit enables or disables (default) averaging. ADC_AVG_INIT starts average using the existing (default) or using a new ADC value.

To enable the ADC, the ADC_EN bit must be set to ‘1’. The ADC is allowed to operate if the VVAC>VVACPRESENT, VVBUS>VVBUSPRESENT or VVOUT>VVOUTPRESENT is valid. If ADC_EN is set to ‘1’ before VAC, VBUS or VOUT reach their respective PRESENT threshold, then the ADC conversion will be postponed until one of the power supplies reaches the threshold.

The ADC_SAMPLE bits control the sample speed of the ADC, with conversion times of tADC_CONV. The integrated ADC has two rate conversion options: a 1-shot mode and a continuous conversion mode set by the ADC_RATE bit. By default, all ADC parameters will be converted in 1-shot or continuous conversion mode unless disabled in the ADC CONTROL 1 and ADC_CONTROL 2 register. If an ADC parameter is disabled by setting the corresponding bit in the ADC CONTROL 1 and ADC_CONTROL 2 register, then the value in that register will be from the last valid ADC conversion or the default POR value (all zeros if no conversions have taken place). If an ADC parameter is disabled in the middle of an ADC measurement cycle, the device will finish the conversion of that parameter, but will not convert the parameter starting the next conversion cycle. Even though no conversion takes place when all ADC measurement parameters are disabled, the ADC circuitry is active and ready to begin conversion as soon as one of the bits in the ADC CONTROL 1 and ADC_CONTROL 2 register is set to ‘0’.

The ADC_DONE_* bits signal when a conversion is complete in 1-shot mode only. During continuous conversion mode, the ADC_DONE_* bits have no meaning and will be ‘0’.

ADC conversion operates independently of the faults present in the device. ADC conversion will continue even after a fault has occurred (such as one that causes the power stage to be disabled), and the host must set ADC_EN = ‘0’ to disable the ADC. ADC readings are only valid for DC states and not for transients. When host writes ADC_EN=0, the ADC stops immediately. If the host wants to exit ADC more gracefully, it is possible to do either of the following:

1. Write ADC_RATE to one-shot, and the ADC will stop at the end of a complete cycle of conversions, or

2. Write all the DIS bits low, and the ADC will stop at the end of the current measurement.

When external sense resistor (RSNS) is placed and IBATADC is used, it is recommended to use 375-kHz switching frequency.