ZHCSNF1 February   2021 BQ25960

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Charging System
      2. 9.3.2  Battery Charging Profile
      3. 9.3.3  Device Power Up
      4. 9.3.4  Device HIZ State
      5. 9.3.5  Dual Input Bi-Directional Power Path Management
        1. 9.3.5.1 ACDRV Turn-On Condition
        2. 9.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 9.3.5.3 Single Input with ACFET1
        4. 9.3.5.4 Dual Input with ACFET1-RBFET1
        5. 9.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 9.3.5.6 OTG and Reverse TX Mode Operation
      6. 9.3.6  Bypass Mode Operation
      7. 9.3.7  Charging Start-Up
      8. 9.3.8  Adapter Removal
      9. 9.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 9.3.10 Device Modes and Protection Status
        1. 9.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 9.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 9.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 9.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 9.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 9.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 9.4 Programming
      1. 9.4.1 F/S Mode Protocol
    5. 9.5 Register Maps
      1. 9.5.1 I2C Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Standalone Application Information (for use with main charger)
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 第三方产品免责声明
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 接收文档更新通知
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 静电放电警告
    7. 13.7 术语表
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring

The device has three temperature sensing mechanisms to protect the device and system during charging:

  1. TSBUS for monitoring the cable connector temperature
  2. TSBAT for monitoring the battery temperature
  3. TDIE for monitoring the internal junction temperature of the device
The TSBUS and TSBAT both rely on a resistor divider that has an external pullup voltage to REGN. Place a negative coefficient thermistor (NTC) in parallel to the low-side resistor. A fault on the TSBUS and TSBAT pin is triggered on the falling edge of the voltage threshold, signifying a “hot” temperature. The threshold is adjusted using the TSBUS_FLT and TSBAT_FLT registers.

The typical TS resistor network on TSBAT_SYNCOUT is illustrated in Figure 9-8. The resistor network on TSBUS is the same.

GUID-20210113-CA0I-SNQW-7DT6-QS5GN1PH11S0-low.gif Figure 9-8 TSBAT_SYNCOUT Resistor Network

The RLO and RHI resistors should be chosen depending on the NTC used. If a 10-kΩ NTC is used, use 10-kΩ resistors for RLO and RHI. If a 100-kΩ NTC is used, use 100-kΩ resistors for RLO and RHI. The ratio of VTS/REGN can be from 0% to 50%, and the voltage at the TS pin is determined by the following equation.

Equation 1. GUID-20200920-CA0I-HG92-JQRZ-JWXQPCMKWSHS-low.gif

The percentage of the TS pin voltage is determined by the following equation.

Equation 2. GUID-4534CFCE-C063-476B-B190-0CA8843A2878-low.gif

Additionally, the device measures internal junction temperature, with adjustable threshold TDIE_FLT in TDIE_FLT register.

If the TSBUS_FLT, TSBAT_FLT, and TDIE_FLT thresholds are reached, the Switched Cap or Bypass Mode is disabled and CHG_EN is set to ‘0’, and the start-up sequence must be followed to resume charging. The corresponding STAT and FLAG bit is set to ‘1’ unless it is masked by the MASK bit. If TSBUS, TSBAT, or TDIE protections are not used, the functions can be disabled in the register by setting the TSBUS_FLT_DIS, TSBAT_FLT_DIS, or TDIE_FLT_DIS bit to ‘1’.

TSBUS_TSBAT_ALM_STAT and FLAG is set to ‘1’ unless it is masked by corresponding mask bit when one of the following conditions is met: 1) TSBUS is within 5% of TSBUS_FLT threshold or 2) TSBAT is within of TSBAT_FLT. If the TSBUS_FLT or TSBAT_FLT is disabled, it will not trigger a TSBUS_TSBAT_ALM interrupt. Using the TDIE_ALM register, an alarm can be set to notify the host when the device die temperature exceeds a threshold. The TDIE_ALM_STAT and TDIE_ALM_FLAG bit is set to ‘1’ unless it is masked by TDIE_ALM_MASK bit. The device will not automatically stop switching when reaching the alarm threshold and the host may decide on the steps to take to lower the temperature, such as reducing the charge current.