ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADC High-Pass Filter Control | 0 | 0 | DAC Digital Effects Filter Control | DAC De-Emphasis Filter Control | 0 | 0 | |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:6 | ADC High-Pass Filter Control | R/W | 0h | ADC high-pass filter control. 00: ADC high-pass filter disabled 01: ADC high-pass filter –3-dB frequency = 0.0045 × ADC fS 10:ADC high-pass filter –3-dB frequency = 0.0125 × ADC fS 11: ADC high-pass filter –3-dB frequency = 0.025 × ADC fS |
5:4 | Reserved | R/W | 0h | Reserved. Always write zeros to these bits. |
3 | DAC Digital Effects Filter Control | R/W | 0h | DAC digital effects filter control. 0: DAC digital effects filter disabled (bypassed) 1: DAC digital effects filter enabled |
2 | DAC De-Emphasis Filter Control | R/W | 0h | DAC de-emphasis filter control. 0: DAC de-emphasis filter disabled (bypassed) 1: DAC de-emphasis filter enabled |
1:0 | Reserved | R/W | 0h | Reserved. Always write zeros to these bits. |