ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | LINE1RM Path Selection | LINE1RP Path Selection | 0 | 0 | LINE1LM Path Selection | LINE1LP Path Selection |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:6 | Reserved | R/W | 0h | Reserved. Always write zeros to these bits. |
5 | LINE1RM Path Selection | R/W | 0h | LINE1RM path selection. 0: Normal signal path 1: Signal is routed by a switch to RIGHT_LOM |
4 | LINE1RP Path Selection | R/W | 0h | LINE1RP path selection. 0: Normal signal path 1: Signal is routed by a switch to RIGHT_LOP |
3:2 | Reserved | R/W | 0h | Reserved. Always write zeros to these bits |
1 | LINE1LM Path Selection | R/W | 0h | LINE1LM path selection. 0: Normal signal path 1: Signal is routed by a switch to LEFT_LOM |
0 | LINE1LP Path Selection | R/W | 0h | LINE1LP path selection. 0: Normal signal path 1: Signal is routed by a switch to LEFT_LOP |