ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DAC Output Switching Control | 0 | 0 | 0 | 0 | 0 | 0 | |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:6 | DAC Output Switching Control | R/W | 0h | DAC output switching control. 00: DAC output selects DAC_1 path 01: DAC output selects DAC_3 path to left line output driver 10, 11: Reserved. Do not write this sequence to these register bits |
5:0 | Reserved | R/W | 0h | Reserved. Always write zeros to these bits. |