ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADC Sample Rate Select | DAC Sample Rate Select | ||||||
R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:4 | ADC Sample Rate Select(1) | R/W | 0h | 0000: ADC fS = fS(ref) / 1 0001: ADC fS = fS(ref) / 1.5 0010: ADC fS = fS(ref) / 2 0011: ADC fS = fS(ref) / 2.5 0100: ADC fS = fS(ref) / 3 0101: ADC fS = fS(ref) / 3.5 0110: ADC fS = fS(ref) / 4 0111: ADC fS = fS(ref) / 4.5 1000: ADC fS = fS(ref) / 5 1001: ADC fS = fS(ref) / 5.5 1010: ADC fS = fS(ref) / 6 1011–1111: Reserved. Do not write these sequences. |
3:0 | DAC Sample Rate Select(1) | R/W | 0h | 0000: DAC fS = fS(ref) / 1 0001: DAC fS = fS(ref) / 1.5 0010: DAC fS = fS(ref) / 2 0011: DAC fS = fS(ref) / 2.5 0100: DAC fS = fS(ref) / 3 0101: DAC fS = fS(ref) / 3.5 0110: DAC fS = fS(ref) / 4 0111: DAC fS = fS(ref) / 4.5 1000: DAC fS = fS(ref) / 5 1001: DAC fS = fS(ref) / 5.5 1010: DAC fS = fS(ref) / 6 1011–1111 : Reserved, do not write these sequences. |