ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PGA_AUX Output Routing Control | PGA_AUX to RIGHT_LOP/M Analog Volume Control | ||||||
R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | PGA_AUX Output Routing Control | R/W | 0h | PGA_AUX output routing control. 0: PGA_AUX is not routed to RIGHT_LOP, RIGHT_LOM 1: PGA_AUX is routed to RIGHT_LOP, RIGHT_LOM |
6:0 | PGA_AUX to RIGHT_LOP/M Analog Volume Control | R/W | 0h | PGA_AUX to RIGHT_LOP, RIGHT_LOM analog volume control. For 7-bit register settings versus analog gain values, see Table 6. |