ZHCSGM5A August 2017 – November 2017 TLV320AIC3109-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DAC_1 Output Routing Control | DAC_1 to LEFT_LOP/M Analog Volume Control | ||||||
R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | DAC_1 Output Routing Control | R/W | 0h | DAC_1 output routing control. 0: DAC_1 is not routed to LEFT_LOP, LEFT_LOM 1: DAC_1 is routed to LEFT_LOP, LEFT_LOM |
6:0 | DAC_1 to LEFT_LOP/M Analog Volume Control | R/W | 0h | DAC_1 to LEFT_LOP, LEFT_LOM analog volume control. For 7-bit register settings versus analog gain values, see Table 6. |