The Arm Cortex-M0+ processor supports a wide range of features to simplify debugging
of application software during development. Key features supported by CC23xx MCUs include:
- Ability to halt the processor
through an assertion of a halt signal, a configured debug event (such as a hard
fault entry or reset), or a BKPT instruction (for software breakpoints)
- Ability to step through instructions (with or without peripheral interrupts
enabled)
- Ability to run through instructions (with or without peripheral interrupts
enabled)
- Ability to read and write CPU registers when halted
- Ability to read exception
information through the system control space (SCS)
- Support for 4 hardware breakpoints
- Support for accessing the device memory map