SWCU193 April 2023 CC2340R2 , CC2340R5 , CC2340R5-Q1
Table 2-86 lists the memory-mapped registers for the SYSTICK registers. All register offset addresses not listed in Table 2-86 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0h | CSR | SysTick Control and Status Register | Go |
4h | RVR | SysTick Reload Value Register | Go |
8h | CVR | SysTick Current Value Register | Go |
Ch | CALIB | SysTick Calibration Value Register | Go |
Complex bit access types are encoded to fit into small table cells. Table 2-87 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
CSR is shown in Table 2-88.
Return to the Summary Table.
SysTick Control and Status Register
Use the SysTick Control and Status Register to enable the SysTick features.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-17 | RESERVED | R | 0h | Reserved |
16 | COUNTFLAG | R | 0h | Returns 1 if timer counted to 0 since last time this was read. Clears on read by application or debugger. |
15-3 | RESERVED | R | 0h | Reserved |
2 | CLKSOURCE | R | 0h | SysTick clock source. Always reads as one if STCALIB reports NOREF. 0x0:Systick driven by external reference clock. 0x1:Systick driven by processor clock |
1 | TICKINT | R/W | 0h | 0x0:Counting down to zero does not pend the systick handler. software can use countflag to determine if the systick handler has ever counted to zero. 0x1:Counting down to zero pends the systick handler. |
0 | ENABLE | R/W | 0h | Enable SysTick counter 0x0:Counter disabled 0x1:Counter operates in a multi-shot way. that is, counter loads with the reload value and then begins counting down. on reaching 0, it sets the countflag to 1 and optionally pends the systick handler, based on tickint. it then loads the reload value again, and begins counting. |
RVR is shown in Table 2-89.
Return to the Summary Table.
SysTick Reload Value Register
Use the SysTick Reload Value Register to specify the start value to load into the current value register when the counter reaches 0. It can be any value between 0 and 0x00FFFFFF. A start value of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are activated when counting from 1 to 0. The reset value of this register is UNKNOWN.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-24 | RESERVED | R | 0h | Reserved |
23-0 | RELOAD | R/W | 0h | Value to load into the SysTick Current Value Register when the counter reaches 0. |
CVR is shown in Table 2-90.
Return to the Summary Table.
SysTick Current Value Register
Use the SysTick Current Value Register to find the current value in the register. The reset value of this register is UNKNOWN.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-24 | RESERVED | R | 0h | Reserved |
23-0 | CURRENT | R/W | 0h | Reads return the current value of the SysTick counter. This register is write-clear. Writing to it with any value clears the register to 0. Clearing this register also clears the COUNTFLAG bit of the SysTick Control and Status Register. |
CALIB is shown in Table 2-91.
Return to the Summary Table.
SysTick Calibration Value Register
Use the SysTick Calibration Value Register to enable software to scale to any required speed using divide and multiply.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | NOREF | R | 0h | If reads as 1, the Reference clock is not provided - the CLKSOURCE bit of the SysTick Control and Status register will be forced to 1 and cannot be cleared to 0. |
30 | SKEW | R | 0h | If reads as 1, the calibration value for 10ms is inexact (due to clock frequency). |
29-24 | RESERVED | R | 0h | Reserved |
23-0 | TENMS | R | 0h | An optional Reload value to be used for 10ms (100Hz) timing, subject to system clock skew errors. If the value reads as 0, the calibration value is not known. |