ZHCSS38 july 2020 TSB82AF15-EP
PRODUCTION DATA
The bridge contains both 1.5-V and 3.3-V power terminals. The following power-up and power-down sequences describe how power is applied to these terminals.
In addition, the bridge has three resets: PERST, GRST, and an internal power-on reset. These resets are described in Section 10.3.2. The following power-up and power-down sequences describe how PERST is applied to the bridge.
The application of the PCIe reference clock (REFCLK) is important to the power-up/-down sequence and is included in the following power-up and power-down descriptions.