The ADS131B23 integrates two digital overcurrent comparators (OCCA, OCCB), that provide a faster response to overcurrent conditions than ADC1y, especially when ADC1y is operating at low data rates. The comparators use the ADC1y ΔΣ modulator (and therefore the same multiplexer and PGA settings as ADC1y) but with a separate digital fast filter that works in parallel to the main ADC1y digital filter. This fast filter is a sinc3 implementation with a fixed OSR of 64. The offset and gain calibration values (OCAL1y[23:0], GCAL1y[15:0]) for ADC1y do not affect the OCCy comparators, which means there is no user calibration of the overcurrent comparators possible.

Enable the overcurrent comparators using the OCCy_EN bits. To use overcurrent comparator OCCy, ADC1y must be enabled (ADC1y_EN = 1b) as well so that the ADC1y modulator is active. However, conversions on ADC1y do not need to be started to use the overcurrent comparator function. The sinc3 filter of the comparator starts operating as soon as the OCCy_EN bit is set and runs independently of the conversion state of ADC1y.

The digital fast filter of the comparator outputs 16-bit conversion results that are internally compared against a high and low threshold, configured by the OCCy_HIGH_TH[15:0] and OCCy_LOW_TH[15:0] register bits, respectively. The comparator triggers when the conversion results exceed the high threshold or when the results fall below the low threshold. Set OCCy_HIGH_TH[15:0] = 7FFFh to disable the high threshold detection. Similarly, set OCCy_LOW_TH[15:0] = 8000h to disable the low threshold detection.

OCCy_NUM[4:0] configures the number of conversions that the output of the digital fast filter must exceed the programmed high or low threshold before flagging an overcurrent condition in the OCCy_HTn or OCCy_LTn status bits, respectively. An internal counter keeps track of the number of conversions that exceed either the high or low threshold. The counter resets as soon as one conversion result drops below the threshold again or when the OCCy comparator is disabled (OCCy_EN = 0b).

Disable the overcurrent comparator (OCCy_EN = 0b) before changing any comparator settings in the OCCy_CFG, OCCy_HIGH_THRESHOLD, or OCCy_LOW_THRESHOLD registers.

Similar to the detailed supply, clock, and digital status flags, the detailed status flags in the OCC_STATUS register feed a combined OCC_FAULTn flag in the STATUS_MSB register. That is, if any of the fault flags in the OCC_STATUS register set to 0b, then the OCC_FAULTn flag sets to 0b as well.

To clear a set OCC_FAULTn flag to 1b after the overcurrent condition is removed, the host must first clear all set fault flags in the OCC_STATUS register. Only after all fault flags in the OCC_STATUS register are cleared to 1b can the host clear the OCC_FAULTn flag by writing 1b.

The ADS131B23 allows additional masking of the four fault flags located in the OCC_STATUS register from triggering the combined OCC_FAULTn flag in the STATUS_MSB register. The masking bits are located in the OCC_FAULT_MASK register. If a fault flag in the OCC_STATUS register is masked, then a fault indicated by this masked fault flag does not trigger the OCC_FAULTn flag in the STATUS_MSB register. However, the fault is still indicated by the fault flag in the OCC_STATUS register.