Individual power-on reset (POR) circuits are implemented on the AVDD, IOVDD, and DVDD supplies. If any of the three supplies drop below the respective POR threshold, the device is held in reset.

The ADS131B23 monitors the outputs of the three internal LDOs (AVDD, IOVDD, and DVDD) for overvoltage (OV), undervoltage (UV), and oscillations. See the Electrical Characteristics table for the according monitor detection thresholds. If an OV event occurs, the respective LDO shuts down to prevent damage to the internal circuitry. The LDO turns back on after the output voltage drops below the OV threshold. The device can potentially reset if the supply voltage drops below the POR threshold before the LDO is turned on again. The LDOs do not shut down when an OV diagnostic is performed.

AVDD or IOVDD can be supplied externally when shorting APWR to AVDD or DPWR to IOVDD, respectively, thus bypassing the internal LDOs. The monitors check the externally provided supply when bypassing the internal LDO. Configure the IOVDD OV and UV monitor thresholds using the IOVDD_OV_TH and IOVDD_UV_TH bits based on the used IOVDD supply.

The AVDD and IOVDD LDOs integrate individual temperature sensors to indicate potential overtemperature events. Configure the overtemperature warning thresholds using the AVDD_OTW_CFG[1:0] and IOVDD_OTW_CFG[1:0] bits.

The AGNDA, AGNDB, and DGND pins are monitored for pin disconnections. The AGND pin is implemented redundantly and therefore does not provide a pin disconnection monitor.

The AVDD and IOVDD LDOs are designed with an output current limit to prevent excessive current draw from the LDOs. When the LDOs operate in current limit, the according fault flags are set. If more current draw is demanded from the LDOs than the current limit, then the LDO output voltage typically drops below the POR threshold and causes a POR event.