ZHCSPK7F November 2004 – January 2022 TPS2384
PRODUCTION DATA
The serial interface used in the TPS2384 is a standard 2-wire I2C target architecture. The standard SDA line of the I2C architecture is broken out into independent input and output data paths. This feature simplifies earth grounded controller applications that require opto-isolators to keep the 48-V return of the Ethernet power system floating. For applications where opto-isolation is not required, the bidirectional property of the SDA line can be restored by connecting SDA_I to SDA_O. The SCL line is a unidirectional input only line as the TPS2384 is always accessed as a target device and it never controls the bus.
Data transfers that require a data-flow reversal on the SDA line are 4-byte operations. This occurs during a TPS2384 port read cycle where a target address byte is sent, followed by a port/register address byte write. A second target address byte is sent followed by the data byte read using the port/register setup from the second byte in the sequence.
The I2C interface and the port read write registers are held in active reset until all input voltages are within specifications (V10, V6.3, V3.3 and V2.5) and the internal POR timer has timed out (see electrical specifications).
The I2C read cycle consists of the following steps 1 through 14 and is shown in Figure 8-18:
Data write transfers to the TPS2384 do not require a data-flow reversal and as such only a 3-byte operation is required. The sequence in this case is to send a target device address byte, followed by a write of the port/register address followed by a write of the data byte for the addressed port.
The I2C write cycle consists of the following steps 1 through 9 and is also shown in Figure 8-18: