제품 상세 정보

Frequency (max) (MHz) 19000 Frequency (min) (MHz) 100 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Wideband Current consumption (mA) 340 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 19000 Frequency (min) (MHz) 100 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Flexible ramp generation, Integer-boundary spurs (IBS) removal, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Wideband Current consumption (mA) 340 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • 10-MHz to 20-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • High phase detector frequency
      • 400-MHz integer mode
      • 300-MHz fractional mode
    • 32-bit fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • Frequency ramp and chirp generation ability for FMCW applications
  • < 20-µs VCO calibration speed
  • 3.3-V single power supply operation
  • 10-MHz to 20-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 45-fs rms jitter at 7.5 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • High phase detector frequency
      • 400-MHz integer mode
      • 300-MHz fractional mode
    • 32-bit fractional-N divider
  • Remove integer boundary spurs with programmable input multiplier
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • Frequency ramp and chirp generation ability for FMCW applications
  • < 20-µs VCO calibration speed
  • 3.3-V single power supply operation

The LMX2595 high-performance, wideband synthesizer that can generate any frequency from 10 MHz to 20 GHz. An integrated doubler is used for frequencies above 15 GHz. The high-performance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.

The LMX2595 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs. The LMX2595 adds support for generating or repeating SYSREF (compliant to JESD204B standard) designed for low-noise clock sources in high-speed data converters. A fine delay adjustment (9-ps resolution) is provided in this configuration to account for delay differences of board traces.

The output drivers within LMX2595 deliver output power as high as 7 dBm at 15-GHz carrier frequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate the need for on-board low noise LDOs.

The LMX2595 high-performance, wideband synthesizer that can generate any frequency from 10 MHz to 20 GHz. An integrated doubler is used for frequencies above 15 GHz. The high-performance PLL with figure of merit of –236 dBc/Hz and high-phase detector frequency can attain very low in-band noise and integrated jitter. The high-speed N-divider has no pre-divider, thus significantly reducing the amplitude and number of spurs. There is also a programmable input multiplier to mitigate integer boundary spurs.

The LMX2595 allows users to synchronize the output of multiple devices and also enables applications that need deterministic delay between input and output. A frequency ramp generator can synthesize up to two segments of ramp in an automatic ramp generation option or a manual option for maximum flexibility. The fast calibration algorithm allows changing frequencies faster than 20 µs. The LMX2595 adds support for generating or repeating SYSREF (compliant to JESD204B standard) designed for low-noise clock sources in high-speed data converters. A fine delay adjustment (9-ps resolution) is provided in this configuration to account for delay differences of board traces.

The output drivers within LMX2595 deliver output power as high as 7 dBm at 15-GHz carrier frequency. The device runs from a single 3.3-V supply and has integrated LDOs that eliminate the need for on-board low noise LDOs.

다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
LMX2694-EP 활성 위상 동기화를 지원하는 향상된 제품 15GHz RF 신시사이저 Extended temperature operation
LMX2820 활성 22.6GHz 광대역 RF 신시사이저 - 위상 동기화, JESD 및 5μs 미만의 주파수 보정 지원 Higher frequency operation and additional features
비교 대상 장치와 유사한 기능
LMX1204 활성 JESD204B/C SYSREF 지원 및 페이즈 동기화를 지원하는 12.8GHz RF 버퍼, 멀티플라이어 및 디바이더 Up to 12.8-GHz clock buffer, multiplier and divider and five-channel JESD support

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
6개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet LMX2595 20-GHz Wideband PLLATINUM™ RF Synthesizer With Phase Synchronization and JESD204B Support datasheet (Rev. C) PDF | HTML 2019/04/16
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 2025/04/11
Application brief Compilation of RF Synthesizer Resources PDF | HTML 2024/10/22
Application note Sine to Square Wave Conversion Using Clock Buffers PDF | HTML 2024/09/03
Circuit design MASH_SEED Optimization and Impact on Spurs (LMX2820) PDF | HTML 2024/08/08
Application note Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A) 2021/08/27

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

LMX2595EVM — 위상 동기화 및 JESD204B를 지원하는 20GHz 광대역 RF 신시사이저 평가 모듈

이 평가 모듈은 업계 최초로 VCO가 통합된 PLL인 LMX2595입니다. 이 PLL은 더블러를 사용하여 최대 15GHz, 최대 20GHz의 기본 VCO 출력을 얻을 수 있습니다. 업계 최고의 PLL FOM은 -129 dBc/Hz의 1/f를 지원하는 -236dBc/Hz입니다. 이 디바이스는 JESD204B 표준(SYSREF 신호를 생성하거나 반복 가능)을 지원하여 고속 데이터 컨버터 클록 시 이상적입니다. EVM 측정의 통합 지터는 9GHz 반송파 주파수에서 50fs 미만입니다. 동기화 신호를 제공하여 사용자가 여러 (...)
사용 설명서: PDF
TI.com에서 구매할 수 없음
평가 보드

XMICR-3P-LMX2595 — LMX2595 X-MWblock 평가 모듈

X-MWblocks consist of RF and Microwave “Drop-In” components that can be used individually for prototyping or in production assemblies. X-MWblocks are easy to test, integrate, align, and configure to 60 GHz and beyond. No messy Sweat Soldering or Silver Epoxy processes are required. X-MWblocks are (...)

발송: X-Microwave
지원 소프트웨어

TICSPRO-SW TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

다운로드 옵션
설계 툴

CLOCK-TREE-ARCHITECT — 클록 트리 아키텍트 프로그래밍 소프트웨어

클록 트리 아키텍트는 시스템 요구 사항에 따라 클록 트리 솔루션을 생성하여 설계 프로세스를 간소화하는 클록 트리 합성 툴입니다. 이 툴은 광범위한 클로킹 제품 데이터베이스에서 데이터를 가져와 시스템 수준의 다중 칩 클로킹 솔루션을 생성합니다.
설계 툴

PLLATINUMSIM-SW PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

다운로드 옵션
패키지 CAD 기호, 풋프린트 및 3D 모델
VQFN (RHA) 40 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

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