ZHCSIF5F December 2015 – April 2019 TPS99000-Q1
PRODUCTION DATA.
TYP | UNIT | |||
---|---|---|---|---|
ten_dly | PROJ_ON to 1.1 V enable. This includes PROJ_ON tglitch time. | Rising edge of PROJ_ON to rising edge of 1.1 V enable. | 11 | ms |
tmon1(1)(2) | Maximum time for 1.1 V rail to reach voltage threshold after enable has been asserted. This delay length will occur even if 1.1 V meets threshold earlier. | Rising edge of ENB_1P1V to internal 1.1 V monitor test. | 10 | ms |
tmon2(1)(2) | Maximum time for 1.8 V rail to reach voltage threshold after enable has been asserted. This delay length will occur even if 1.8 V meets threshold earlier. | Rising edge of ENB_1P8V to internal 1.8 V monitor test. | 10 | ms |
tmon3(1)(2) | Maximum time for 3.3 V rail to reach voltage threshold after enable has been asserted. This delay length will occur even if 3.3 V meets threshold earlier. | Rising edge of ENB_3P3V to internal 3.3 V monitor test. | 10 | ms |
tw1 | RESETZ delay after voltage testing completion. | Completion of 3.3 V monitor test to RESETZ rising edge. | 10 | ms |