ZHCSIF5F December 2015 – April 2019 TPS99000-Q1
PRODUCTION DATA.
Upon entry to STANDBY state, RESETZ is set high and DLPC230-Q1 begins its boot process.
Exit options from STANDBY state include:
During the STANDBY phase, the DLPC230-Q1 software performs DMD and DLPC230-Q1 sequencer configuration steps. The software is in charge of DMD voltage enable timing, interleaving necessary DMD configuration register writes, and DLPC230-Q1 ASIC block configuration steps. After the DLPC230-Q1 software begins enabling DMD voltages, the TPS99000-Q1 proceeds to POWERING_DMD state.