ZHCSIF5F December   2015  – April 2019 TPS99000-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     典型的独立系统
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions - Initialization, Clock, and Diagnostics
    2.     Pin Functions - Power and Ground
    3.     Pin Functions - Power Supply Management
    4.     Pin Functions - Illumination Control
    5.     Pin Functions - Serial Peripheral Interfaces
    6.     Pin Functions - Analog to Digital Converter
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Transimpedance Amplifier Parameters
    6. 6.6  Electrical Characteristics - Digital to Analog Converters
    7. 6.7  Electrical Characteristics - Analog to Digital Converter
    8. 6.8  Electrical Characteristics - FET Gate Drivers
    9. 6.9  Electrical Characteristics - Photo Comparator
    10. 6.10 Electrical Characteristics - Voltage Regulators
    11. 6.11 Electrical Characteristics - Temperature and Voltage Monitors
    12. 6.12 Electrical Characteristics - Current Consumption
    13. 6.13 Power-Up Timing Requirements
    14. 6.14 Power-Down Timing Requirements
    15. 6.15 Timing Requirements - Sequencer Clock
    16. 6.16 Timing Requirements - Host / Diagnostic Port SPI Interface
    17. 6.17 Timing Requirements - ADC Interface
    18. 6.18 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Illumination Control
        1. 7.3.1.1 Illumination System High Dynamic Range Dimming Overview
        2. 7.3.1.2 Illumination Control Loop
        3. 7.3.1.3 Continuous Mode Operation
          1. 7.3.1.3.1 Output Capacitance in Continuous Mode
          2. 7.3.1.3.2 Continuous Mode Driver Distortion and Blanking Current
          3. 7.3.1.3.3 Continuous Mode S_EN2 Dissipative Load Shunt Options
          4. 7.3.1.3.4 Continuous Mode Constant OFF Time
          5. 7.3.1.3.5 Continuous Mode Current Limit
        4. 7.3.1.4 Discontinuous Mode Operation
          1. 7.3.1.4.1 Discontinuous Mode Pulse Width Limit
          2. 7.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
          3. 7.3.1.4.3 Dimming Within Discontinuous Operation Range
          4. 7.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
          5. 7.3.1.4.5 TIA Gain Adjustment
          6. 7.3.1.4.6 Current Limit in Discontinuous Mode
          7. 7.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
      2. 7.3.2 Over-Brightness Detection
        1. 7.3.2.1 Photo Feedback Monitor BIST
        2. 7.3.2.2 Excessive Brightness BIST
      3. 7.3.3 Analog to Digital Converter
        1. 7.3.3.1 Analog to Digital Converter Input Table
      4. 7.3.4 Power Sequencing and Monitoring
        1. 7.3.4.1 Power Monitoring
      5. 7.3.5 DMD Mirror Voltage Regulator
      6. 7.3.6 Low Dropout Regulators
      7. 7.3.7 System Monitoring Features
        1. 7.3.7.1 Windowed Watchdog Circuits
        2. 7.3.7.2 Die Temperature Monitors
        3. 7.3.7.3 External Clock Ratio Monitor
      8. 7.3.8 Communication Ports
        1. 7.3.8.1 Serial Peripheral Interface (SPI)
    4. 7.4 Device Functional Modes
      1. 7.4.1 OFF
      2. 7.4.2 STANDBY
      3. 7.4.3 POWERING_DMD
      4. 7.4.4 DISPLAY_RDY
      5. 7.4.5 DISPLAY_ON
      6. 7.4.6 PARKING
      7. 7.4.7 SHUTDOWN
    5. 7.5 Register Maps
      1. 7.5.1 System Status Registers
      2. 7.5.2 ADC Control
      3. 7.5.3 General Fault Status
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 HUD
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Application Design Considerations
          1. 8.2.1.2.1 Photodiode Considerations
          2. 8.2.1.2.2 LED Current Measurement
          3. 8.2.1.2.3 Setting the Current Limit
          4. 8.2.1.2.4 Input Voltage Variation Impact
          5. 8.2.1.2.5 Discontinuous Mode Photo Feedback Considerations
          6. 8.2.1.2.6 Transimpedance Amplifiers (TIAs, Usage, Offset, Dark Current, Ranges, RGB Trim)
      2. 8.2.2 Headlight
        1. 8.2.2.1 Design Requirements
  9. 9 Power Supply Recommendations
    1. 9.1 TPS99000-Q1 Power Supply Architecture
    2. 9.2 TPS99000-Q1 Power Outputs
    3. 9.3 Power Supply Architecture
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power/High Current Signals
      2. 10.1.2 Sensitive Analog Signals
      3. 10.1.3 High Speed Digital Signals
      4. 10.1.4 High Power Current Loops
      5. 10.1.5 Kelvin Sensing Connections
      6. 10.1.6 Ground Separation
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方产品免责声明
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 术语表
  12. 12机械、封装和可订购信息
    1. 12.1 Package Option Addendum
      1. 12.1.1 Tape and Reel Information
      2. 12.1.2 Mechanical Drawings

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2 Typical Applications

There are two configurations for this chip, HUD and headlight. Table 3 shows the differences for the pin connections between the two configurations.

Table 3. Pin Configuration Differences for HUD and Headlight

PIN NAME DESCRIPTION HUD HEADLIGHT
12 COMPOUT Photodiode (PD) Interface High-speed comparator output Connect to DLPC230-Q1 GPIO_02 No connect
15 SYNC External LED buck driver sync strobe output See Setting the Current Limit No connect
18 D_EN LED Interface; Buck High-Side FET Drive Enable Connect to DLPC230-Q1 D_EN (GPIO_04) Connect to DLPC230-Q1 D_EN (GPIO_04) or ground
19 S_EN LED Bypass Shunt Strobe Input Connect to DLPC230-Q1 S_EN (GPIO_03) Connect to DLPC230-Q1 S_EN (GPIO_03) or ground
20 LED_SEL_0 LED Enable Strobe 0 Input Connect to DLPC230-Q1 PMIC_LEDSEL_0 Connect to DLPC230-Q1 PMIC_LEDSEL_0 or ground
21 LED_SEL_1 LED Enable Strobe 1 Input Connect to DLPC230-Q1 PMIC_LEDSEL_1 Connect to DLPC230-Q1 PMIC_LEDSEL_1 or ground
22 LED_SEL_2 LED Enable Strobe 2 Input Connect to DLPC230-Q1 PMIC_LEDSEL_2 Ground
23 LED_SEL_3 LED Enable Strobe 3 Input Connect to DLPC230-Q1 PMIC_LEDSEL_3 Ground
38 DRV_EN Drive enable for LM3409 Driver select enable Resistor to ground
39 CMODE Capacitor selection output (allows for a smaller capacitance to be used in CM mode for less over/under shoot). Open drain See CMODE Big Cap Mode in Discontinuous Operation No connect
40 DMUX0 Digital test point output Either connect to test point or leave unconnected. Do not ground. Either connect to test point or leave unconnected. Do not ground.
41 DMUX1 Digital test point output Either connect to test point or leave unconnected. Do not ground. Either connect to test point or leave unconnected. Do not ground.
43 S_EN1 Low resistance shunt NFET drive enable [High means shunt active] See Continuous Mode S_EN2 Dissipative Load Shunt Options Shunt enable / No connect
44 S_EN2 High resistance shunt NFET drive enable [High means shunt active] See Continuous Mode S_EN2 Dissipative Load Shunt Options No connect
45 R_EN Red channel select. Drive for low side NFET FET enable FET enable / No connect
46 G_EN Green channel select. Drive for low side NFET FET enable FET enable / No connect
47 B_EN Blue channel select. Drive for low side NFET FET enable FET enable / No connect
57 AMUX1 Analog Test Mux Output 1 Either connect to test point or leave unconnected. Do not ground. Either connect to test point or leave unconnected. Do not ground.
61 AMUX0 Analog Test Mux Output 0 Either connect to test point or leave unconnected. Do not ground. Either connect to test point or leave unconnected. Do not ground.
62 VIN_LDOT_M8 Dedicated TIA Interface –8 V(nom) LDO external regulation FET drive signal for -8 V regulator Refer to Low Dropout Regulators Connect as described inLow Dropout Regulators or do not connect (select NC option in SW).
63 VLDOT_M8 Dedicated TIA Interface –8 V(nom) LDO filtered supply (regulated voltage feedback) Refer to Low Dropout Regulators Connect as described inLow Dropout Regulators or do not connect (select NC option in SW).
76 R_IADJ External resistance for IADJ voltage to current transformation See Setting the Current Limit Ground
77 IADJ Current output used to adjust external LED controller drive current set point See Setting the Current Limit Ground
85 ADC_IN1 External ADC Channel 1, see Table 2 Connect to LED anode with voltage divider No connect / Optional (customer use)
86 ADC_IN2 External ADC Channel 2, see Table 2 Optional (LED input voltage) No connect / Optional (customer use)
88 ADC_IN3 External ADC Channel 3, see Table 2 No connect / Optional (customer use) No connect / Optional (customer use)
90 ADC_IN4 External ADC Channel 4, see Table 2 No connect / Optional (customer use) No connect / Optional (customer use)
92 ADC_IN5 External ADC Channel 5, see Table 2 No Connect / Optional (Thermistor) No connect / Optional (customer use)
93 ADC_IN6 External ADC Channel 6, see Table 2 No Connect / Optional (Thermistor) No connect / Optional (customer use)
94 ADC_IN7 External ADC Channel 7, see Table 2 No Connect / Optional (Thermistor) No connect / Optional (customer use)

Pulldown resistors are required on the pins in the below table to avoid a floating input during the power-up and power-down conditions.

Table 4. Pulldown Resistor Requirements

PIN NAME TYP
5 ADC_MOSI 10 kΩ
6 WD1 10 kΩ
16 SEQ_START 10 kΩ
17 SEQ_CLK 10 kΩ
18 D_EN(1) 10 kΩ
19 S_EN(1) 10 kΩ
20 LED_SEL_0(1) 10 kΩ
21 LED_SEL_1(1) 10 kΩ
22 LED_SEL_2(1) 10 kΩ
23 LED_SEL_3(1) 10 kΩ
27 SPI1_CLK 10 kΩ
30 SPI1_DIN 10 kΩ
31 SPI2_DIN 10 kΩ
34 SPI2_CLK 10 kΩ
49 DMD_VOFFSET(2) 56 kΩ
50 DMD_VBIAS(2) 110 kΩ
51 DMD_VRESET(2) 68 kΩ
(1) If these pins are not connected to the DLPC230-Q1 (as in a Headlight configuration) then they may be tied directly to ground without a pulldown resistor.
(2) Resistor pull downs are required to create a minimum load for DMD_VOFFSET, DMD_VBIAS, and DMD_VRESET. Each of these pulldowns should provide a load from 0.1mA to 1mA. If the -8 V LDO is used, then the pull down for DMD_VRESET may be eliminated. If only one or zero TIAs are used, then these pull downs may draw up to 1mA of current.