ZHCSNK4A October 2019 – February 2021 MSP430F5438A-ET
PRODUCTION DATA
PARAMETER | TEST CONDITIONS (1) | VCC | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|---|
EI | Integral linearity error (2) | ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 4.0 MHz | 2.2 V, 3 V | ±1.7 | LSB | ||
ADC12SR = 0, REFOUT = 0 | fADC12CLK ≤ 2.7 MHz | ±2.5 | ||||||
ED | Differential linearity error (2) | ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 4.0 MHz | 2.2 V, 3 V | +1.5 | LSB | ||
ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 2.7 MHz | +1.0 | ||||||
ADC12SR = 0, REFOUT = 0 | fADC12CLK ≤ 2.7 MHz | +2.5 | ||||||
EO | Offset error (3) | ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 4.0 MHz | 2.2 V, 3 V | ±4.0 | LSB | ||
ADC12SR = 0, REFOUT = 0 | fADC12CLK ≤ 2.7 MHz | ±4.0 | ||||||
EG | Gain error (3) | ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 4.0 MHz | 2.2 V, 3 V | ±2.5 | LSB | ||
ADC12SR = 0, REFOUT = 0 | fADC12CLK ≤ 2.7 MHz | ±1.5% (4) | VREF | |||||
ET | Total unadjusted error | ADC12SR = 0, REFOUT = 1 | fADC12CLK ≤ 4.0 MHz | 2.2 V, 3 V | ±5 | LSB | ||
ADC12SR = 0, REFOUT = 0 | fADC12CLK ≤ 2.7 MHz | ±1.5% (4) | VREF |