|
| RSVD (Bit 7): RSVD. Do not use. |
| | |
| CUVC (Bit
6): I*R compensated CUV |
| 1 = | Enabled (default) |
| 0 = | Disabled |
| | |
| OTD (Bit
5): Overtemperature in discharge |
| 1 = | Enabled (default) |
| 0 = | Disabled |
| | |
| OTC (Bit
4): Overtemperature in charge |
| 1 = | Enabled (default) |
| 0 = | Disabled |
| | |
| ASCDL (Bit
3): Short circuit in discharge latch |
| 1 = | Enabled (default) |
| 0 = | Disabled |
| | |
| RSVD_ONE (Bit
2): Reserved and programmed to 1. Do not use. |
|
| AOCCL
(Bit 1): Short circuit in charge latch |
| 1 = | Enabled (default) |
| 0 = | Disabled |
| | |
| AOCC
(Bit 0): Short circuit in charge |
| 1 = | Enabled (default) |
| 0 = | |