ZHCSNJ7A April 2021 – February 2023 TDES954
PRODUCTION DATA
RX port specific register. The V3Link Port Select register 0x4C configures which unique RX port registers can be accessed by I2C read and write commands.
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7 | GPIO3_FALL_IE | R/W | 0x0 | GPIO3 Fall Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a falling edge on GPIO3. |
6 | GPIO3_RISE_IE | R/W | 0x0 | GPIO3 Rise Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a rising edge on GPIO3. |
5 | GPIO2_FALL_IE | R/W | 0x0 | GPIO2 Fall Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a falling edge on GPIO2. |
4 | GPIO2_RISE_IE | R/W | 0x0 | GPIO2 Rise Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a rising edge on GPIO2. |
3 | GPIO1_FALL_IE | R/W | 0x0 | GPIO1 Fall Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a falling edge on GPIO1. |
2 | GPIO1_RISE_IE | R/W | 0x0 | GPIO1 Rise Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a rising edge on GPIO1. |
1 | GPIO0_FALL_IE | R/W | 0x0 | GPIO0 Fall Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a falling edge on GPIO0. |
0 | GPIO0_RISE_IE | R/W | 0x0 | GPIO0 Rise Interrupt Enable. If this bit is set, an interrupt will be generated based on detection of a rising edge on GPIO0. |