ZHCST39A December 2022 – September 2023 AFE11612-SEP
PRODUCTION DATA
This register uses software to force the DAC into a clear state.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | ICLR [11:0] | Reserved | |||||||||||||
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
14-3 | ICLR | R/W | 0 | Software clear DACn bit. 0: DACn is restored to normal operation 1: DACn is forced into a clear state |