SLUUCW9 December 2023 BQ76972
Class | Subclass | Name | Type | Min | Max | Default | Unit |
---|---|---|---|---|---|---|---|
Settings | Protection | Protection Configuration | H2 | 0x0000 | 0x07FF | 0x0002 | Hex |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RSVD_0 | RSVD_0 | RSVD_0 | RSVD_0 | RSVD_0 | SCDL_CURR_RECOV | OCDL_CURR_RECOV | FETF_FUSE |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PACK_FUSE | RSVD_0 | PF_OTP | PF_FUSE | PF_DPSLP | PF_REGS | PF_FETS | RSVD_0 |
Bit | Field | Default | Description |
---|---|---|---|
10 | SCDL_CURR_RECOV | 0 | The SCD Latch fault can recover based on load removal detection on the LD pin, by host command, or by charge current. When the current-based recovery mechanism is not desired, it can be disabled by clearing this bit.
0 = SCDL does not recover based on charge current. 1 = SCDL recovers when current is greater than or equal to Protections:SCDL:Recovery Threshold for Protections:SCDL:Recovery Time. |
9 | OCDL_CURR_RECOV | 0 | The OCD Latch fault can recover based on load removal detection on the LD pin, by host command, or by charge current. When the current-based recovery mechanism is not desired, it can be disabled by clearing this bit.
0 = OCDL does not recover based on charge current. 1 = OCDL recovers when current is greater than or equal to Protections:OCDL:Recovery Threshold for Protections:OCDL:Recovery Time. |
8 | FETF_FUSE | 0 | When a Permanent Failure has been detected, the device can be configured to blow the fuse. This normally requires the voltage being above Settings:Fuse:Min Blow Fuse Voltage. When this bit is set and a FET failure occurs (CFETF or DFETF), the voltage requirement is bypassed.
0 = Voltage must be above a threshold to blow the fuse when CFETF or DFETF trips. 1 = If configured to blow the fuse and CFETF or DFETF occurs, fuse blow is attempted regardless of voltage. |
7 | PACK_FUSE | 0 | The fuse is typically located on the BAT side of the FETs, so the device monitors the Top of Stack voltage to determine if fuse blow is possible. However, some systems can place the fuse on the PACK side, in which case the PACK pin voltage should be monitored to determine if fuse blow is possible. Setting this bit causes the device to use the PACK pin voltage instead of the Top of Stack pin voltage for this comparison.
0 = Top of Stack voltage must be above Settings:Fuse:Min Blow Fuse Voltage in order to blow the fuse. 1 = PACK voltage must be above Settings:Fuse:Min Blow Fuse Voltage in order to blow the fuse. |
5 | PF_OTP | 0 | Since the device stores Permanent Failure status in RAM, that status would be lost when the device resets. To mitigate this, the device can write Permanent Failure status to OTP when this bit is set. OTP programming can be delayed in low-voltage and high-temperature conditions until OTP programming can reliably be accomplished. Note that writes to OTP during operation are only allowed if Settings:Manufacturing:Mfg Status Init[OTPW_EN] is set. If this bit is set but
Settings:Manufacturing:Mfg Status Init[OTPW_EN] is clear, Permanent Failure status is saved to RAM that is preserved across a partial reset but is not programmed to OTP. If this bit is not set, Permanent Failure status is lost on any reset, including a partial reset by the RST_SHUT pin.
0 = Permanent Failure status is lost on reset. 1 = Permanent Failure status is preserved across reset when possible. |
4 | PF_FUSE | 0 | When a Permanent Failure occurs, the device can be configured to blow the fuse when voltage conditions are met.
0 = Permanent Failure does not cause the device to blow the fuse. 1 = Permanent Failure causes the device to blow the fuse. |
3 | PF_DPSLP | 0 | Normally, a Permanent Failure causes the FETs to remain off indefinitely and the fuse can be blown. In that situation, there is no further action that would be taken on further monitoring operations. Additionally, charging would no longer be possible. To avoid rapidly draining the battery, the device can be configured to enter DEEPSLEEP mode when a Permanent Failure occurs. DEEPSLEEP is still delayed until after fuse blow and OTP programming are completed if those options are enabled.
0 = Device does not automatically enter DEEPSLEEP mode when a Permanent Failure occurs. 1 = Device automatically enters DEEPSLEEP mode when a Permanent Failure occurs. |
2 | PF_REGS | 0 | When a Permanent Failure occurs, the device can be configured to either turn the regulators off or to leave them in their present state. Once disabled, they can still be re-enabled via command.
0 = Permanent Failure does not cause the device to turn the regulators off. 1 = Permanent Failure causes the device to turn the regulators off. |
1 | PF_FETS | 1 | When a Permanent Failure occurs, the device normally turns the FETs off. An option is provided to disable this behavior if the host wants to maintain greater control.
0 = Permanent Failure does not cause the device to turn the FETs off. 1 = Permanent Failure causes the device to turn the FETs off. |