Generation 3 C2000 MCUs come with different configurations of Flash memory that is arranged in multiple sectors. Unfortunately, the technology used for the on-chip Flash memory does not allow adding a traditional EEPROM on the chip. Some designers use an external EEPROM part for such non-volatile storage. The good news is that Flash memory is a specific type of EEPROM and all Generation 3 C2000 MCUs have in-circuit programming ability for the Flash memory. This application report makes use of this facility and allows using sectors of on-chip Flash as EEPROM by emulating the EEPROM functionality within the limitations of the Flash memory. Note that at least one Flash sector is entirely used as an emulated EEPROM; therefore, it is not available for the application code.

EEPROMs are available in different capacities and connect with the host microcontrollers via a serial and sometimes parallel interface. The serial inter-integrated circuit (I2C) and serial peripheral interface (SPI) are quite popular due to the minimal number of pins/traces. EEPROMs can be programmed and erased electrically and most of the serial EEPROMs allow byte-by-byte program or erase operations.

The major difference between EEPROM and Flash operations is seen in the erase operation. The EEPROM does not require a sector erase operation. One can erase a particular byte requiring the specified time. However, the smallest unit of an erase operation in Flash is one sector.

Flash erase and write cycles are performed by applying time-controlled voltages to each cell. In the erase condition, each cell (bit) reads logical 1. Therefore, every Flash location of a C2000 Real-Time Controller reads 0xFFFF when erased. Through programming, the cell can be changed to logical 0. Any word can be overwritten to change a bit from logical 1 to 0 (assuming corresponding ECC has not been programmed); but not the other way around. The on-chip Flash memory on Generation 3 C2000 MCUs parts require TI-supplied specific algorithms (Flash API) for erase and write operations.

The implementation described in this document supports both Single-Unit and Ping-Pong EEPROM Emulation. Single-Unit and Ping-Pong implementations both support two modes, Page-Programming and 64-Bit Programming mode. Ping-Pong Emulation will be described first, and Single-Unit will be described subsequently.

There are multiple user-configurable EEPROM variables supported by this implementation. These variables are detailed in Section 5.1.

In this implementation, the emulated EEPROM is comprised of at least one Flash Sector. Due to the block erase requirement of Flash, a Flash sector has to be entirely reserved for the EEPROM Emulation. Based on the C2000 part number, the size of the Flash sector will vary. The area of the Flash sector is divided into a number of smaller sections and is referred to as a Page. For example, a 2K x 16 flash sector can be divided into 32 pages, each with a size of 64 x 16.

The data to be saved is first written in a buffer in RAM. Then, using the in-circuit programming facility of Generation 3 C2000 MCUs, the data is written to the first page in the selected sector(s) for EEPROM Emulation. The next time data is written to Flash, it will be written to the next page. This process continues until the last page in the selected sector is written. Upon reaching the last page, there are two ways to continue. If using Single-Unit EEPROM emulation, see the Single-Unit Emulation behavior to see how this is handled. If using Ping Pong EEPROM Emulation, see Ping-Pong Method to see how this is handled.

In addition to the Page Programming concept described above, there is also support for 64-Bit Programming. In this mode, the sectors is not broken into EEPROM banks and pages. 64-Bit Programming is discussed further in Section 5.2.9 and Section 5.2.10 .

If using Single-Unit EEPROM Emulation, Figure 3-1 shows the implemented behavior.

Figure 3-1 Single-Unit Behavior

If the EEPROM unit is full and there is more data to be written, the EEPROM unit is erased and the new data is programmed to Flash. This process can be repeated as necessary.

If using the Ping Pong method, the following diagram shows the implemented behavior. As shown in Figure 3-2, there are two EEPROM units made up of selected Flash Sectors. One is marked as an Active Unit, and the other is marked as the Inactive Unit. To begin, data is written to the Active Unit.

Figure 3-2 Ping Pong Behavior

If the Active Unit is full and there is more data to be written, the Active and Inactive EEPROM units will switch. Therefore, the previously Active Unit (full Unit) will be marked as Inactive, and the previously Inactive Unit (empty Unit) will be marked as Active. Subsequently, the data will be written to the newly Active EEPROM Unit. After the data is successfully programmed to the Active EEPROM Unit, the Inactive EEPROM Unit is erased. This method ensures that there is a fall-back options for the last successfully written data in case of any failure during the erase or program operation when the currently active EEPROM Unit is full.

This process can be repeated as necessary.

In order to support EEPROM emulation with varying data sizes (other than 64-bits), the Flash Sectors selected for emulation are divided into a format referred to as EEPROM Banks (not to be confused with Flash Banks) and Pages. First, the Flash sector (or set of chosen Flash Sectors) is divided into EEPROM banks. Each EEPROM bank is further divided into Pages. This partitioning is shown in Bank Partitioning. The partitioning of EEPROM Banks and Pages is the same for Single-Unit and Ping-Pong emulation.

Using this format allows the application to:

• Read back the data from the page written during the previous save
• Write the latest data to a new page
• Read from any previously stored data, if required by the application

Figure 3-3 Bank Partitioning

The first eight 16-bit words of each EEPROM bank are reserved for EEPROM bank status information and the first eight words of each page are reserved for page status information. Every time a new set of data is written to a page, the status location of the last page and the next page are modified. When a new EEPROM bank is used the Bank Status of the last and current EEPROM banks are updated. Both the EEPROM Bank and Page status words differentiate between the current EEPROM Bank/Page and a used EEPROM Bank/Page in the same way. To mark an EEPROM Bank or Page as current, the first 64-bits are written with the appropriate status code. To mark an EEPROM Bank or Page as full, the latter 64-bits are written with the appropriate status code. More details about the status codes can be found in the EEPROM_GetValidBank.

As seen in Page Layout, all pages contain an eight-word page status and a configurable amount of data space. Page 0 is slightly different as it contains the EEPROM bank status as well. Only Pages 0 and 1 are shown, but it should be noted that Page 2 through Page (N-1) are identical to Page 1.

Figure 3-4 Page Layout