SPRACF0D May 2018 – April 2026 F28377D-SEP , TMS320C28341 , TMS320C28342 , TMS320C28343 , TMS320C28343-Q1 , TMS320C28344 , TMS320C28345 , TMS320C28346 , TMS320C28346-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F2802-Q1 , TMS320F28020 , TMS320F28021 , TMS320F28022 , TMS320F28022-Q1 , TMS320F28023 , TMS320F28023-Q1 , TMS320F28026 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027 , TMS320F28027-Q1 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28030 , TMS320F28030-Q1 , TMS320F28031 , TMS320F28031-Q1 , TMS320F28032 , TMS320F28032-Q1 , TMS320F28033 , TMS320F28033-Q1 , TMS320F28034 , TMS320F28034-Q1 , TMS320F28035 , TMS320F28035-Q1 , TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28053 , TMS320F28054 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F28055 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28232 , TMS320F28232-Q1 , TMS320F28234 , TMS320F28234-Q1 , TMS320F28235 , TMS320F28235-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S
Table 4-1 lists the common error codes and the associated debug steps.
| Error Message | Debug Steps |
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This error is usually reported when the JTAG signals are not connected correctly, though the error can also be caused by poor signal quality. Verify that the JTAG connections between the target and probe comply with the data sheet's recommendations. This also occurs if the debug probe is using a 4-pin JTAG when TDI and TDO are used as general-purpose inputs - outputs (GPIO) at runtime. This can also occur if pullup or pulldown resistors are too strong, so try removing them when debugging. Please compare with the data sheet's recommendations. This error sometimes occurs if the device is not booting correctly. Watch the power rails and XRSn with an oscilloscope to make sure that the device boots correctly and XRSn goes high. XRSn periodically rebooting is expected on unprogrammed devices due to the watchdog. See the buffered case section of the hardware design guide. |
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1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code. 2. Set device to wait-boot mode. 3. Follow the Manual Launch instructions and connect to the device. 4. Verify that you are able to read PARTID in the memory browser. 5. Try again to program the device. 6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only? Is XRSn properly asserting? |
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This error message is usually caused by hardware related issues. Verify that VDDIO/VDD are properly supplied. Confirm that XRSn is asserting high, indicating that the device is properly coming out of reset. Long JTAG cables, improper termination, or excessive capacitance can also degrade the JTAG signal integrity as well. |
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1. Check the target configuration file to make sure that the correct debug probe is selected. 2. Check to see if debug probe is visible in PC device manager. 3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged. |
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1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code. 2. Set device to wait-boot mode. 3. Follow the Manual Launch instructions and connect to the device. 4. Verify that you are able to read PARTID in the memory browser. 5. Try again to program the device. 6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only? XRSn is properly asserting? |
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Try power cycling the debug probe without power cycling the target MCU. Try more reliable JTAG settings like lower clock frequency. |
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Verify that the intended JTAG/cJTAG mode is configured in the target configuration file (*.ccxml). Note that certain TI EVMs (LaunchPad/controlCARD) can only support 2-pin or 4-pin JTAG depending on the board design. Please refer to the EVM User's Guide to confirm. This error is also typically reported when the JTAG signals have poor signal quality. Verify JTAG connections between the target and probe conform with the data sheet. Try lower TCK frequency and check trace lengths. See the buffered case section of the hardware design guide. |
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For some devices, only one breakpoint is allowed when running code from flash since hardware breakpoints must be used. Check the device data sheet for the number of hardware breakpoints available. |
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1. Check the target configuration file to make sure that the correct debug probe is selected. 2. Check to see if debug probe is visible in the PC device manager. 3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged. |
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1. Verify that the intended JTAG/cJTAG mode is configured in the target configuration file (*.ccxml). Note that certain TI EVMs (LaunchPad/controlCARD) can only support 2-pin or 4-pin JTAG depending on the board design. Please refer to the EVM User's Guide to confirm. 2. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code. 3. Set device to wait-boot mode. 4. Follow the Manual Launch instructions and connect to the device. 5. Verify that you are able to read PARTID in the memory browser. 6. Try again to program the device. 7. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only? XRSn is properly asserting? |
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1. Check the target configuration file to make sure that the correct debug probe is selected. 2. Check to see if the debug probe is visible in the PC device manager. 3. Try replacing the USB cable, or try a different debug probe to make sure the probe in use is not damaged. |
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This error message only happens if the VTREF pin on the debug probe is not connected to 3.3V. Make sure that the target board is powered on and XRSn is properly asserting. |
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1. Verify that Test Connection in the target configuration passes. If the connection fails, follow the steps for that error code. 2. Set device to wait-boot mode. 3. Follow the Manual Launch instructions and connect to the device. 4. Verify that you are able to read PARTID in the memory browser. 5. Try again to program the device. 6. If applying these steps still fails to clear the error, check the following: Are there password locations on the device? On-chip flash tool settings? Is it possible to program RAM only? XRSn is properly asserting? |
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This error is reported when the JTAG signals have poor signal quality. Try lower TCK frequency and check trace lengths. See the buffered case section of the hardware design guide. |