SPRUJ28C november 2021 – june 2023 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
GLBCE needs 2 lines of line memories and 1 set of cache memories.
Memory Type | Qty | Size | Clock | ECC Supported | Description |
---|---|---|---|---|---|
DELAY LINE | 1 | 2122 x 64 (GLBCE_LINE_SIZE/2+10)x64 | FCLK | No | GLBCE line memory |
STATMEM | 8 banks | 16 bit x 1024 | FCLK | Yes | GLBCE Cache memory (computes and stores the statistics from the frame) |