ZHCSI27C April   2018  – October 2021 LM5036

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High-Voltage Start-Up Regulator
      2. 7.3.2  Undervoltage Lockout (UVLO)
      3. 7.3.3  Reference Regulator
      4. 7.3.4  Oscillator, Synchronized Input
      5. 7.3.5  Voltage-Mode Control
      6. 7.3.6  Primary-Side Gate Driver Outputs (LSG and HSG)
      7. 7.3.7  Half-Bridge PWM Scheme
      8. 7.3.8  Maximum Duty Cycle Operation
      9. 7.3.9  Pre-Biased Start-Up Process
        1. 7.3.9.1 Primary FETs Soft-Start Process
        2. 7.3.9.2 Synchronous Rectifier (SR) Soft-Start Process
      10. 7.3.10 Zero Duty Cycle Operation
      11. 7.3.11 Enhanced Cycle-by-Cycle Current Limiting with Pulse Matching
      12. 7.3.12 Reverse Current Protection
      13. 7.3.13 CBC Threshold Accuracy
      14. 7.3.14 Hiccup Mode Protection
      15. 7.3.15 Hiccup Mode Blanking
      16. 7.3.16 Over-Temperature Protection (OTP)
      17. 7.3.17 Over-Voltage / Latch (ON_OFF Pin)
      18. 7.3.18 Auxiliary Constant On-Time Control
      19. 7.3.19 Auxiliary On-Time Generator
      20. 7.3.20 Auxiliary Supply Current Limiting
      21. 7.3.21 Auxiliary Primary Output Capacitor Ripple
      22. 7.3.22 Auxiliary Ripple Configuration and Control
      23. 7.3.23 Asynchronous Mode Operation of Auxiliary Supply
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Input Transient Protection
        3. 8.2.2.3  Level-Shift Detection Circuit
        4. 8.2.2.4  Applications with VIN > 100-V
        5. 8.2.2.5  Applications without Pre-Biased Start-Up Requirement
        6. 8.2.2.6  UVLO Voltage Divider Selection
        7. 8.2.2.7  Over Voltage, Latch (ON_OFF Pin) Voltage Divider Selection
        8. 8.2.2.8  SS Capacitor
        9. 8.2.2.9  SSSR Capacitor
        10. 8.2.2.10 Half-Bridge Power Stage Design
        11. 8.2.2.11 Current Limit
        12. 8.2.2.12 Auxiliary Transformer
        13. 8.2.2.13 Auxiliary Feedback Resistors
        14. 8.2.2.14 RON Resistor
        15. 8.2.2.15 VIN Pin Capacitor
        16. 8.2.2.16 Auxiliary Primary Output Capacitor
        17. 8.2.2.17 Auxiliary Secondary Output Capacitor
        18. 8.2.2.18 Auxiliary Feedback Ripple Circuit
        19. 8.2.2.19 Auxiliary Secondary Diode
        20. 8.2.2.20 VCC Diode
        21. 8.2.2.21 Opto-Coupler Interface
        22. 8.2.2.22 Full-Bridge Converter Applications
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
        1. 11.2.1.1 Receiving Notification of Documentation Updates
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.13 CBC Threshold Accuracy

The CBC current limit amplifier deployed within LM5036 is a precise component. In common with all such devices the input bias currents and input offset voltage will lead to small variations in the current trip threshold between parts and across temperature.

GUID-AA69C0E6-1E84-435F-A11B-7ADBDF3B29B6-low.gifFigure 7-16 Diagram of Current Limiting Function with Error Terms Shown in Red

At its trip threshold the two inputs of the CBC comparator must be equal. At this condition the voltage on the CS_NEG pin is given by Equation 17.

Equation 17. GUID-CEFCE979-5EE9-4316-A6FC-4BF98F030939-low.gif

The voltage drop across the ideal amplifier input must be zero. The voltage of the CS_POS pin, at the trip threshold can be expressed as follows:

Equation 18. GUID-E5F7BA6C-A245-4C69-B789-3233F9249788-low.gif
Equation 19. GUID-9570F38B-9D65-47D9-9F67-B1E9620CB736-low.gif

Combining Equation 17, Equation 18 and Equation 19 and re-arranging gives an expression for the voltage across the current sense resistor at the trip threshold Equation 20.

Equation 20. GUID-45E4E709-DFA4-428B-A624-B71D9D8FA8C1-low.gif

Hence, for a given set of external component values, the variation in current trip threshold across parts and temperature can be found using data supplied in the Electrical Tables.

A short delay will exist (tCSLSG), after the CBC comparator inputs reach their trip threshold, before the LSG falling edge. During this delay the primary current will continue to ramp, giving rise to a further error in the apparent trip threshold. The peak primary current flowing when the low side MOSFET switches OFF (IPriCBC), is expressed by Equation 21.

Equation 21. GUID-38B9C954-863B-4D83-850F-22A999C9C9FF-low.gif

The output current at which the primary peak current threshold is reached is expressed by Equation 22.

Equation 22. GUID-31463FBB-064B-49C0-8574-7D885A49E91C-low.gif

ΔILO is the amplitude of ripple current in the output inductor and is expressed in Equation 23.

Equation 23. GUID-680C98F3-E782-44FA-BCF2-8EE6E339F2FC-low.gif

ΔILMag is the amplitude of ripple current in the magnetising inductor and is expressed in Equation 24.

Equation 24. GUID-0596C70C-91A5-4CF2-AADF-EEE0D3A9CAA1-low.gif

Combining Equation 22, Equation 23 and Equation 24 gives an expression for output current limit as a function of primary current limit threshold Equation 25.

Equation 25. GUID-37439434-3229-465C-90E1-CAE1145724EA-low.gif

The Excel Calculator Tool can be used to evaluate the tolerance of output current limit.