홈 마이크로컨트롤러(MCU) 및 프로세서 마이크로프로세서 및 DSP 멀티미디어 및 산업용 네트워킹 SoC
홈
마이크로컨트롤러(MCU) 및 프로세서
마이크로프로세서 및 DSP
멀티미디어 및 산업용 네트워킹 SoC

AM3517

활성

Sitara 프로세서: Arm Cortex-A8, 3D 그래픽, 비디오 프론트 엔드

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AM3517

활성
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제품 상세 정보

CPU 1 Arm Cortex-A8 Frequency (MHz) 60 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
CPU 1 Arm Cortex-A8 Frequency (MHz) 60 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
BGA (ZER) 484 529 mm² 23 x 23 NFBGA (ZCN) 491 289 mm² 17 x 17
  • AM3517/05 Sitara Processor:
    • MPU Subsystem
      • 600-MHz Sitara ARM Cortex-A8 Core
      • NEON SIMD Coprocessor and Vector
        Floating-Point (FP) Coprocessor
    • Memory Interfaces:
      • 166-MHz 16- and 32-Bit mDDR/DDR2
        Interface with 1GB of Total Addressable
        Space
      • Up to 83 MHz General-Purpose Memory
        Interface Supporting 16-Bit-Wide
        Multiplexed Address/DataBus
      • 64KB of SRAM
      • 3 Removable Media Interfaces
        [MMC/SD/SDIO]
    • IO Voltage:
      • mDDR/DDR2 IOs: 1.8V
      • Other IOs: 1.8V and 3.3V
    • Core Voltage: 1.2V
    • Commercial and Extended Temperature Grade
      (operating restrictions apply)
    • 16-Bit Video Input Port Capable of
      Capturing HD Video
    • HD Resolution Display Subsystem
    • Serial Communication
      • High-End CAN Controller
      • 10/100 Mbit Ethernet MAC
      • USB OTG Subsystem with Standard
        DP/DM Interface [HS/FS/LS]
      • Multiport USB Host Subsystem [HS/FS/LS]
        • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
          Interface
      • Four Master and Slave Multichannel Serial
        Port Interface(McSPI) Ports
      • Five Multichannel Buffered Serial Ports (McBSPs)
        • 512-Byte Transmit and Receive Buffer
          (McBSP1/3/4/5)
        • 5-KB Transmit and Receive Buffer (McBSP2)
        • SIDETONE Core Support (McBSP2 and
          McBSP3 Only)For Filter, Gain, and Mix
          Operations
        • 128-Channel Transmit and Receive Mode
        • Direct Interface to I2S and PCM Device and
          TDM Buses
      • HDQ/1-Wire Interface
      • 4 UARTs (One with Infrared Data Association
        [IrDA] and Consumer Infrared [CIR] Modes)
      • 3 Master and Slave High-Speed Inter-Integrated
        Circuit (I2C) Controllers
      • Twelve 32-bit General-Purpose Timers
      • One 32-bit Watchdog Timer
      • One 32-bit 32-kHz Sync Timer
      • Up to 186 General-Purpose I/O (GPIO) Pins
  • Display Subsystem
    • Parallel Digital Output
    • Up to 24-Bit RGB
    • Supports Up to 2 LCD Panels
    • Support for Remote Frame Buffer Interface (RFBI)
      LCD Panels
    • Two 10-Bit Digital-to-Analog Converters (DACs)
      Supporting
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation of 90, 180, and 270 Degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-Bit Alpha Blending
  • Video Processing Front End (VPFE) 16-Bit Video Input Port
    • RAW Data Interface
    • 75-MHz Maximum Pixel Clock
    • Supports REC656/CCIR656 Standard
    • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
      Horizontal and Vertical Sync Signals)
    • Generates Optical Black Clamping Signals
    • Built-in Digital Clamping and Black Level Compensation
    • 10-Bit to 8-Bit A-law Compression Hardware
    • Supports up to 16K Pixels (Image Size) in Horizontal
      and Vertical Directions
  • System Direct Memory Access (sDMA) Controller (32 Logical
    Channels with Configurable Priority)
  • Comprehensive Power, Reset, and Clock Management
  • ARM Cortex-A8 Memory Architecture
    • ARMv7 Architecture
      • In-Order, Dual-Issue, Superscalar Microprocessor Core
      • ARM NEON Multimedia Architecture
      • Over 2x Performance of ARMv6 SIMD
      • Supports Both Integer and Floating-Point SIMD
      • Jazelle RCT Execution Environment Architecture
      • Dynamic Branch Prediction with Branch Target Address
        Cache, Global History Buffer and 8-Entry Return Stack
      • Embedded Trace Macrocell [ETM] Support for
        Noninvasive Debug
      • 16KB of Instruction Cache (4-Way Set-Associative)
      • 16KB of Data Cache (4-Way Set-Associative)
      • 256KB of L2 Cache
    • PowerVR SGX Graphics Accelerator (AM3517 Only)
      • Tile-Based Architecture Delivering up to 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine
        Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and
        2.0, OpenVG1.0
      • Fine-Grained Task Switching, Load Balancing, and
        Power Management
      • Programmable, High-Quality Image Anti-Aliasing
    • Endianess
      • ARM Instructions – Little Endian
      • ARM Data – Configurable
    • SDRC Memory Controller
      • 16- and 32-Bit Memory Controller with 1GB of
        Total Address Space
      • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
        (mDDR)SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-Bit-Wide Multiplexed Address/Data Bus
      • Up to 8 Chip-Select Pins with 128MB of Address
        Space per Chip-Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (with ECC
        Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface
        to Custom Logic (FPGA, CPLD, ASICs, and so forth)
      • Nonmultiplexed Address/Data Mode (Limited 2-KB
        Address Space)
    • Test Interfaces
      • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
      • Embedded Trace Macro Interface (ETM)
    • 65-nm CMOS Technology
    • Packages:
      • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
        [ZCN Suffix]
        with Via Channel Array
        Technology
      • 484-Pin PBGA (23 x 23, 1-mm Pitch)
        [ZER Suffix]
    • AM3517/05 Sitara Processor:
      • MPU Subsystem
        • 600-MHz Sitara ARM Cortex-A8 Core
        • NEON SIMD Coprocessor and Vector
          Floating-Point (FP) Coprocessor
      • Memory Interfaces:
        • 166-MHz 16- and 32-Bit mDDR/DDR2
          Interface with 1GB of Total Addressable
          Space
        • Up to 83 MHz General-Purpose Memory
          Interface Supporting 16-Bit-Wide
          Multiplexed Address/DataBus
        • 64KB of SRAM
        • 3 Removable Media Interfaces
          [MMC/SD/SDIO]
      • IO Voltage:
        • mDDR/DDR2 IOs: 1.8V
        • Other IOs: 1.8V and 3.3V
      • Core Voltage: 1.2V
      • Commercial and Extended Temperature Grade
        (operating restrictions apply)
      • 16-Bit Video Input Port Capable of
        Capturing HD Video
      • HD Resolution Display Subsystem
      • Serial Communication
        • High-End CAN Controller
        • 10/100 Mbit Ethernet MAC
        • USB OTG Subsystem with Standard
          DP/DM Interface [HS/FS/LS]
        • Multiport USB Host Subsystem [HS/FS/LS]
          • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
            Interface
        • Four Master and Slave Multichannel Serial
          Port Interface(McSPI) Ports
        • Five Multichannel Buffered Serial Ports (McBSPs)
          • 512-Byte Transmit and Receive Buffer
            (McBSP1/3/4/5)
          • 5-KB Transmit and Receive Buffer (McBSP2)
          • SIDETONE Core Support (McBSP2 and
            McBSP3 Only)For Filter, Gain, and Mix
            Operations
          • 128-Channel Transmit and Receive Mode
          • Direct Interface to I2S and PCM Device and
            TDM Buses
        • HDQ/1-Wire Interface
        • 4 UARTs (One with Infrared Data Association
          [IrDA] and Consumer Infrared [CIR] Modes)
        • 3 Master and Slave High-Speed Inter-Integrated
          Circuit (I2C) Controllers
        • Twelve 32-bit General-Purpose Timers
        • One 32-bit Watchdog Timer
        • One 32-bit 32-kHz Sync Timer
        • Up to 186 General-Purpose I/O (GPIO) Pins
    • Display Subsystem
      • Parallel Digital Output
      • Up to 24-Bit RGB
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI)
        LCD Panels
      • Two 10-Bit Digital-to-Analog Converters (DACs)
        Supporting
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-Video)
      • Rotation of 90, 180, and 270 Degrees
      • Resize Images From 1/4x to 8x
      • Color Space Converter
      • 8-Bit Alpha Blending
    • Video Processing Front End (VPFE) 16-Bit Video Input Port
      • RAW Data Interface
      • 75-MHz Maximum Pixel Clock
      • Supports REC656/CCIR656 Standard
      • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
        Horizontal and Vertical Sync Signals)
      • Generates Optical Black Clamping Signals
      • Built-in Digital Clamping and Black Level Compensation
      • 10-Bit to 8-Bit A-law Compression Hardware
      • Supports up to 16K Pixels (Image Size) in Horizontal
        and Vertical Directions
    • System Direct Memory Access (sDMA) Controller (32 Logical
      Channels with Configurable Priority)
    • Comprehensive Power, Reset, and Clock Management
    • ARM Cortex-A8 Memory Architecture
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Microprocessor Core
        • ARM NEON Multimedia Architecture
        • Over 2x Performance of ARMv6 SIMD
        • Supports Both Integer and Floating-Point SIMD
        • Jazelle RCT Execution Environment Architecture
        • Dynamic Branch Prediction with Branch Target Address
          Cache, Global History Buffer and 8-Entry Return Stack
        • Embedded Trace Macrocell [ETM] Support for
          Noninvasive Debug
        • 16KB of Instruction Cache (4-Way Set-Associative)
        • 16KB of Data Cache (4-Way Set-Associative)
        • 256KB of L2 Cache
      • PowerVR SGX Graphics Accelerator (AM3517 Only)
        • Tile-Based Architecture Delivering up to 10 MPoly/sec
        • Universal Scalable Shader Engine: Multi-threaded Engine
          Incorporating Pixel and Vertex Shader Functionality
        • Industry Standard API Support: OpenGLES 1.1 and
          2.0, OpenVG1.0
        • Fine-Grained Task Switching, Load Balancing, and
          Power Management
        • Programmable, High-Quality Image Anti-Aliasing
      • Endianess
        • ARM Instructions – Little Endian
        • ARM Data – Configurable
      • SDRC Memory Controller
        • 16- and 32-Bit Memory Controller with 1GB of
          Total Address Space
        • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
          (mDDR)SDRAM
        • SDRAM Memory Scheduler (SMS) and Rotation Engine
      • General Purpose Memory Controller (GPMC)
        • 16-Bit-Wide Multiplexed Address/Data Bus
        • Up to 8 Chip-Select Pins with 128MB of Address
          Space per Chip-Select Pin
        • Glueless Interface to NOR Flash, NAND Flash (with ECC
          Hamming Code Calculation), SRAM and Pseudo-SRAM
        • Flexible Asynchronous Protocol Control for Interface
          to Custom Logic (FPGA, CPLD, ASICs, and so forth)
        • Nonmultiplexed Address/Data Mode (Limited 2-KB
          Address Space)
      • Test Interfaces
        • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
        • Embedded Trace Macro Interface (ETM)
      • 65-nm CMOS Technology
      • Packages:
        • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
          [ZCN Suffix]
          with Via Channel Array
          Technology
        • 484-Pin PBGA (23 x 23, 1-mm Pitch)
          [ZER Suffix]

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.
      filter 기타 멀티미디어 및 산업용 네트워킹 SoC 찾기
      다운로드 스크립트와 함께 비디오 보기 비디오
      추가 정보 요청

      장치에 연결된 문서 중 몇 개가 제한되어 있으며 수출 규제를 거쳐야 합니다. 현재 위치 및 IP 주소가 TI 서버에 등록되는 방법에 따라 이러한 특정 문서에 액세스하는 데 문제가 있을 수 있습니다.

      기술 자료

      star =TI에서 선정한 이 제품의 인기 문서
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      12개 모두 보기
      상위 문서 유형 직함 형식 옵션 날짜
      * Data sheet AM3517, AM3505 Sitara Processors datasheet (Rev. F) PDF | HTML 2014/07/10
      * Errata AM3517, AM3505 Sitara Processors Silicon Errata (Rev. E) 2016/09/21
      * User guide AM35x ARM Microprocessor Technical Reference Manual (Rev. C) 2013/11/22
      More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 2020/12/16
      User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 2018/09/24
      White paper Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 2016/08/11
      Technical article Spring has sprung. A sale has sprung. PDF | HTML 2016/04/04
      Application note Multi-Channel SAE-J2716 (SENT) Decoder Using NHET 2010/08/05
      Application note AM35x Power Estimation Spreadsheet 2010/05/24
      Application note AM35x VCA PCB Layout 2010/05/24
      Application note Migrating from OMAP3530 to AM35x 2010/05/24
      Application note AM3517/05 Pwr Ref Design 3.6V to 6.3-V Input, Hi-Effic, Integratd 5-Output PMIC 2010/04/08

      설계 및 개발

      추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

      디버그 프로브

      TMDSEMU200-U — XDS200 USB 디버그 프로브

      XDS200은 TI 임베디드 장치를 디버깅하는 데 사용되는 디버그 프로브(에뮬레이터)입니다. 대부분의 장치의 경우 더욱 저렴한 신형 XDS110(www.ti.com/tool/TMDSEMU110-U)을 사용하실 것을 권장합니다. XDS200은 단일 포드에서 다양한 표준(IEEE1149.1, IEEE1149.7, SWD)을 지원합니다. 모든 XDS 디버그 프로브는 ETB(임베디드 트레이스 버퍼)가 포함되어 있는 모든 Arm® 및 DSP 프로세서에서 코어 및 시스템 트레이스를 지원합니다.

      XDS200은 TI 20핀 커넥터(TI 14핀, (...)

      TI.com에서 구매할 수 없음
      디버그 프로브

      TMDSEMU560V2STM-U — XDS560v2 시스템 추적 USB 디버그 프로브

      XDS560v2는 디버그 프로브의 XDS560™ 제품군 중 최고의 성능을 가진 제품으로, 기존의 JTAG 표준(IEEE1149.1)과 cJTAG(IEEE1149.7)를 모두 지원합니다. SWD(직렬 와이어 디버그)는 지원하지 않습니다.

      모든 XDS 디버그 프로브는 ETB(Embedded Trace Buffer)를 특징으로 하는 모든 ARM 및 DSP 프로세서에서 코어 및 시스템 추적을 지원합니다. 핀을 통한 추적의 경우 XDS560v2 PRO TRACE가 필요합니다.

      XDS560v2는 MIPI HSPT 60핀 커넥터(TI 14핀, (...)

      TI.com에서 구매할 수 없음
      디버그 프로브

      TMDSEMU560V2STM-UE — XDS560v2 시스템 추적 USB 및 이더넷 디버그 프로브

      The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

      All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

      TI.com에서 구매할 수 없음
      소프트웨어 개발 키트(SDK)

      ANDROIDSDK-SITARA — Sitara 마이크로프로세서용 Android 개발 키트

      원래 모바일 핸드셋용으로 설계되었지만, Android 운영 체제는 임베디드 애플리케이션 설계자에게 고수준 OS를 제품에 쉽게 추가할 수 있는 기능을 제공합니다. Google과 공동으로 개발한 Android는 통합 및 생산에 즉시 사용할 수 있는 완전한 운영 체제를 제공합니다.


      Android OS의 주요 특징은 다음과 같습니다.

      • 완전한 오픈 소스 소프트웨어 솔루션
      • Linux 기반
      • 상업용 개발을 위한 단순한 라이선스 조건(Apache)
      • 완전한 애플리케이션 프레임워크 포함
      • Java를 통해 고객이 개발한 애플리케이션을 쉽게 통합 가능
      • 멀티미디어, (...)
      View Options
      소프트웨어 개발 키트(SDK)

      LINUXEZSDK-AM35X — Linux EZ SDK for AM3517, AM3505

      SITARA LINUX SDK

      Linux Software Development Kits (SDK) provide Sitara™ developers with an easy set up and quick out-of-box experience that is specific to and highlights the features of TI's ARM processors. Launching demos, benchmarks and applications is a snap with the included graphical user (...)

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어
      다운로드 옵션
      코드 예제 또는 데모

      DEMOAPP-AM35X — 데모- AM35x 애플리케이션 예제 및 데모 코드

      Free Example Code - TI provides proof-of-concept application code to demonstrate some of the hardware and software capabilities of its devices.

      • Click GET SOFTWARE to access Application Demo and Documentation, based on the AM35x EVM (evaluation module).
      View Options
      드라이버 또는 라이브러리

      WIND-3P-VXWORKS-LINUX-OS — Wind River 프로세서 VxWorks 및 Linux 운영 체제

      Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
      발송: Wind River Systems
      파트너 사이트 방문
      IDE, 구성, 컴파일러 또는 디버거

      CCSTUDIO — Code Composer Studio integrated development environment (IDE)

      CCStudio™ IDE is part of TI's extensive CCStudio™ development tool ecosystem. It is an integrated development environment (IDE) for TI's microcontrollers, processors, wireless connectivity devices and radar sensors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize (...)

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어
      시작 다운로드 옵션
      운영 체제(OS)

      GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
      발송: Green Hills Software
      파트너 사이트 방문
      운영 체제(OS)

      MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
      발송: Mentor Graphics Corporation
      파트너 사이트 방문
      운영 체제(OS)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      QNX Neutrino® RTOS(실시간 운영 체제)는 자동차, 의료, 운송, 군사 및 산업용 임베디드 시스템을 위한 차세대 제품을 지원하도록 설계된 모든 기능을 갖춘 견고한 RTOS입니다. 마이크로커널 설계 및 모듈식 아키텍처를 통해 고객은 낮은 총 소유 비용으로 고도로 최적화되고 안정적인 시스템을 만들 수 있습니다.
      발송: QNX Software Systems
      파트너 사이트 방문
      소프트웨어 프로그래밍 도구

      FLASHTOOL — FlashTool for AM35x, AM37x, DM37x and OMAP35x Devices

      Flash Tool is a Windows-based application that can be used to transfer binary images from a host PC to TI Sitara AM35x, AM37x, DM37x and OMAP35x target platforms.


      Additional Information:

      TI GForge - Welcome to gforge.ti.com

      TI E2E Community

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어
      다운로드 옵션
      소프트웨어 프로그래밍 도구

      UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

      UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

      UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

      지원되는 제품 및 하드웨어

      지원되는 제품 및 하드웨어
      시작 다운로드 옵션
      시뮬레이션 모델

      AM35x ZCN BSDL Model (Rev. A)

      SPRM452A.ZIP (11 KB) - BSDL Model
      다운로드
      시뮬레이션 모델

      AM35x ZCN IBIS Model (Rev. A)

      SPRM451A.ZIP (1436 KB) - IBIS Model
      다운로드
      시뮬레이션 모델

      AM35x ZER BSDL Model

      SPRM505.ZIP (10 KB) - BSDL Model
      다운로드
      시뮬레이션 모델

      AM35x ZER IBIS Model (Rev. A)

      SPRM504A.ZIP (1431 KB) - IBIS Model
      다운로드
      계산 툴

      CLOCKTREETOOL — Sitara, 오토모티브, 비전 분석 및 디지털 신호 프로세서용 클록 트리 툴

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
      • Visualize the device clock tree
      • Interact with clock tree (...)
      사용 설명서: PDF
      View Options
      계산 툴

      POWEREST — 전력 예상 툴(PET)

      PET(전력 예상 툴)은 사용자가 일부 TI 프로세서의 소비 전력에 대한 인사이트를 얻게 해줍니다. 이 툴에는 사용자가 여러 가지 애플리케이션 시나리오를 선택하여 소비 전력뿐 아니라, 전체 소비 전력을 더 줄이기 위해 고급 전력 절약 기법을 적용하는 방법을 파악할 수 있는 기능이 포함되어 있습니다.
      AM57x 및 AM437x 프로세서용 PET:

      이 다운로드 가능한 스프레드시트는 사용자가 애플리케이션에 필요한 장치 매개 변수를 입력하는 메커니즘입니다. 매개 변수로는 IP 활동/로딩, 원하는 전력 상태 및 전력 관리 사용량 등이 (...)

      View Options
      패키지 핀 CAD 기호, 풋프린트 및 3D 모델
      BGA (ZER) 484 Ultra Librarian
      NFBGA (ZCN) 491 Ultra Librarian
      TI의 평가 항목에 대한 표준 약관이 적용됩니다.

      주문 및 품질

      포함된 정보:
      • RoHS
      • REACH
      • 디바이스 마킹
      • 납 마감/볼 재질
      • MSL 등급/피크 리플로우
      • MTBF/FIT 예측
      • 물질 성분
      • 인증 요약
      • 지속적인 신뢰성 모니터링
      포함된 정보:
      • 팹 위치
      • 조립 위치

      지원 및 교육

      TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

      포럼 주제 모두 보기(영문)

      콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

      품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

      동영상