ZHCSKK3B December 2019 – February 2022 TPS6594-Q1
PRODUCTION DATA
Several registers inside the TPS6594-Q1 have pre-configured default values that are stored in the NVM of the TPS6594-Q1. These registers are referred to as NVM pre-configured registers.
When the device transitions from the LP_STANDBY or the SAFE_RECOVERY to the INIT state, based on FIRST_STARTUP_DONE bit, the registers are reset and the NVM is read. When the FIRST_STARTUP_DONE is '0', registers which are not in the RTC domain are reset, and all of the NVM pre-configured registers including the ones in the RTC domain, are loaded from the NVM. When the FIRST_STARTUP_DONE bit is set to '1', typically after the initial power up from a supply power cycle, the registers in the RTC domain are not reset, and the NVM pre-configured registers in the RTC domain are not re-loaded from the NVM. This prevents the control and status bits stored in the RTC domain registers from being over written.
FIRST _STARTUP_DONE | NVM pre-configured registers in RTC Domain | Registers without NVM pre-configuration in RTC Domain | Other NVM pre-configured registers | Registers without NVM pre-configuration |
---|---|---|---|---|
0 | Defaults read from NVM | No changes | Reset and defaults read from NVM | Reset |
1 | No changes | No changes | Reset and defaults read from NVM | Reset |
Below are the NVM pre-configured register bits in the RTC domain:
Below are the register bits without NVM pre-configuration in the RTC domain: