ZHCSJK5D January 2018 – June 2022 TCAN4550-Q1
In standby mode, the bus transmitter does not send data nor will the normal mode receiver accept data. There are several blocks that are active in this mode. The low power CAN receiver is active, monitoring the bus for the wake-up pattern (WUP). The wake pin monitor is active. The SPI interface is active so that the microprocessor can read and write registers in the memory for status and configuration. The INH pin is active in order to supply an enable to the VIO controller if this function is used. The nWKRQ pin is low in this mode in the default configuration and can also be used as a digital enable pin to an external regulator or power management integrated circuit (PMIC). All other blocks are put into the lowest power state possible. This is the only mode that the TCAN4550-Q1 automatically switches to without a SPI transaction. The device goes from sleep mode to standby mode automatically upon a bus WUP event or a local wake-up from the wake pin. Upon entry to Standby Mode, only one wake interrupt is given (either LWU or CANINT). New wake interrupts are not given in standby mode unless the device changes to normal or sleep mode and then back to standby. This prevents CAN traffic from spamming the processor with interrupts while in standby, and it gives the processor the first wake interrupt that was issued.
Upon power up, a power on reset or wake event from sleep mode the TCAN4550-Q1 enters standby mode. This starts a four-minute timer, tINACTIVE, that requires the processor to either reset the interrupt flags or configure the device to normal mode. This feature makes sure the node is in the lowest power mode if the processor does not come up properly. This automatic mode change also takes place when the device has been put into sleep mode and receives a wake event, WUP or LWU. To disable this feature for sleep events, register 16'h0800 (SWE_DIS) must be set to one. This will not disable the feature when powering up or when a power on reset takes place.