ZHCSJK5C January 2018 – October 2020 TCAN4550-Q1
This pin is a dedicated wake up request pin from a bus wake (WUP) request, local wake (LWU) request and power on (PWRON). The nWKRQ pin is defaulted to a wake enable based upon a wake event. In this configuration the output is pulled low and latched to serve as an enable for a regulator that does not use the INH pin to control voltage level. The nWKRQ pin can be configured by setting 16'h0800 = 1 as an interrupt pin that pulls the output low, but once the wake interrupt flag is cleared it releases the output back to a high. This pin defaults to an internal 3.6 V rail that is active during sleep mode. In this configuration, if a wake event takes place, the nWKRQ pin switches from high to low. This output can be configured to be powered from the VIO rail through SPI programming, 16'h0800. When powered off of the VIO pin, the device does not insert an interrupt until the VIO rail is stable. When configured for VIO, this pin is an open drain output and requires an external pull up resistor to VIO rail. This configuration bit is saved for all modes of operation and does not reset in sleep mode. As some external regulators or power management chips may need a digital logic pin for a wake up request, this pin can be used.