ZHCSE36D August 2015 – April 2018 LMK03328
PRODUCTION DATA.
R Divider for PLL2
Bit # | Field | Type | Reset | EEPROM | Description | |
---|---|---|---|---|---|---|
[7:3] | RESERVED | - | - | N | Reserved. | |
[2:0] | PLL2RDIV[2:0] | RW | 0x0 | Y | PLL2 R Divider. PLL2 R Divider ratio is set by PLL2RDIV. | |
PLL2RDIV | PLL2 R-Divider Value | |||||
0 (0x0) | Bypass | |||||
1 (0x1) | 2 | |||||
... | ... | |||||
7 (0x7) | 8 |