Brett Barr

Over the course of this series of blogs, I have covered a number of different FET applications, from motor control to power supply. Alas, I have arrived at the final topic – selecting a MOSFET for hot swap.

When a power supply is abruptly disconnected from its load, large current swings across the circuit’s parasitic inductive elements can generate dramatic voltage spikes that can be detrimental to the electrical components on the circuit. Similar to a battery protection application, here the MOSFET acts to insulate input power supply from the rest of the circuitry. In this case however, the FET is not meant to immediately sever the connection between input and output, but rather limit the severity of those destructive current surges. This is accomplished via a controller regulating the gate-to-source bias on a MOSFET placed in between an input power supply (V_IN) and the output voltage (V_OUT)  forcing the MOSFET to operate in a saturation mode, and thus impeding the amount of current that can pass through (see Figure 1).

Before anything else, your first consideration for this FET should be selecting an appropriate breakdown voltage, which is generally 1.5 to 2x the maximum input voltage.  For instance, 12V systems tend to implement 25V or 30V FETs, and 48V systems tend to implement 100V or in some cases 150V FETS. The next consideration should be the MOSFET’s safe operating area (SOA) – a curve provided in the datasheet that is especially useful for indicating how susceptible a MOSFET is turn thermal runaway during short power surges not unlike those it must absorb in hot-swap applications. I wrote a post last year about how we at TI go about measuring and then generating the SOA of a MOSFET as it appears on the device’s datasheet. If you haven’t read that, you may want to consider giving it a skim, because for this application, the SOA is the most crucial criteria for making an appropriate selection.

The critical question for you, the designer, to ask is what is the maximum current surge that the FET might see (or be expected to limit to the output) and how long will this surge last. Once you know this, it is relatively simple to look up the corresponding current and voltage differential on the SOA figure in the device datasheet.

For instance, if your design has an input of 48V and you want to limit the current to the output to no more than 2A for 8ms, you could refer to the CSD19532KTT, CSD19535KTT and CSD19536KTT SOAs’ 10ms curves (Figure 2) and deduce that the latter two devices might work, whereas the CSD19532KTT would be insufficient. But since the CSD19535KTT is good enough with some margin, the performance of the more costly CSD19536KTT may be overkill for this application.

In the example above, I assumed an ambient temperature of 25˚C, the same condition at which the SOA was measured at on the datasheet. But if the end application could be exposed to a much hotter environment, you must derate the SOA in proportion to how close the higher ambient temperature is to the FET’s maximum junction temperature. Let’s say for instance that the max ambient temperature of the end system is 70˚C; you would derate the curves of the SOA using Equation 1:

In this case, the CSD19535KTT’s 10ms, 48V capability would decrease from ~2.5A to ~1.8A. You would then deduce that particular FET would probably no longer be capable enough for this application and instead, select the CSD19536KTT.

It’s worth noting this method of derating assumes that the MOSFET will fail at exactly the max junction temperature, which is generally not the case. Say the failure points measured in the SOA testing actually occur at 200˚C or some other arbitrary higher value; the calculated derating will be closer to unity. That is to say, this derating methodology errs on the conservative side.

The SOA will also dictate the type of MOSFET package you select. D2PAK packages can house large silicon die, so they are very popular for higher-power applications. Smaller 5mm-by-6mm and 3.3mm-by-3.3mm quad flat no-lead (QFN) packages are preferable for lower-power applications. For current surges less than 5 – 10A, the FET is most often integrated with the controller.

A few final caveats:

• While I was speaking specifically to hot-swap applications here, you could apply the same SOA selection process to any situation where the FET operates in the saturation region. You could even use the same method for selecting a FET for OR-ing applications, power over Ethernet (PoE), or even slow switching applications like motor control, where there is going to be substantial high V_DS and I_DS overlap during MOSFET turn off.
• Hot swap is an application that tends to use surface-mount FETs as opposed to through-hole FETs (like TO-220s or I-PAK packages). The reason is that the heating that takes place for short pulse durations and thermal runaway events are very localized. In other words, the capacitive thermal impedance elements from the silicon junction to case prevent heat from dissipating into a board or heat sink fast enough to cool the junction. Junction-to-case thermal impedance (R_θJC), a function of die size, is important, but junction-to-ambient thermal impedance (R_θJA), a function of package, board and system thermal environment, is much less so. For that same reason, it is pretty rare to see heat sinks used for these applications.
• Designers often assume that the lowest-resistance MOSFET in a catalog will have the most capable SOA. There is some logic to this – lower resistance within the same silicon generation is usually indicative of a larger silicon die inside the package, which does yield greater SOA capability and lower junction-to-case thermal impedance. However, as silicon generations improve in resistance per unit area (RSP), they tend to increase in cell density. The denser the cell structure inside the silicon die, the more susceptible the die tends to be to thermal runaway. That is why older-generation FETs with much higher resistance sometimes also have much better SOA performance. The takeaway is that it always pays to investigate and compare the SOA.
• I would be remiss if I did not remind you (as I did in my blog post last year) not all datasheet SOAs are created equal, and you should not take all vendors’ SOAs at face value. Although TI certainly stands by the SOAs in its datasheets, it’s always best to have real data when possible.

TI has a number of hot swap controllers that you can learn more about here. For reference, Table 1-Table 3 at the end of this post highlight some devices we commonly recommend for hot swap, that provide some easy look up values for SOA capability.

That brings me to the conclusion of this MOSFET selection blog series. Thank you for reading, and I hope you learned something in the process. If you have any questions about this or any other post, feel free to post a comment below, or ask a question in TI’s E2E™ Community forum here.