6 Test Setup and Procedures

There were two input supplies used to power the F28377D-SEP which provided V_DDIO, V_DDA (3.3V nominal) and V_DD (1.2V nominal). The V_DDIO and V_DDA for the device was provided via an Agilent E36311A power module and ranged from 3.46V for the SEL to 3.3V for the SET testing. The V_DD for the device was provided by an Agilent E36311A power module and ranged from 1.26V for SEL to 1.2V for the SET testing.

For SEL testing two primary signals were monitored to detect a transient event, 2 GPIOs on the device with a 100kHz "Heartbeat" controlled via FW using the on-chip CPU Timers on each CPU. The XRSn signal was also monitored to correlate if the reset was activated when the Heartbeat signals went out of specification. Both Heartbeats were monitored using a NI PXIe-5172 Scope. Auxiliary signals were monitored with multiple Saleae Logic Pro 16's logic analyzers to record the state of the ERRORSTS pin, as well as GPIOs that were used to show the state of the Reset Cause Register and NMI Reset Cause Register. For SET testing a NI PXIe 4135 SMU was used to supply the F28377D-SEP with power and monitor its current consumption. The Saleae Logic Pro 16's were re-used in the same manner as the SEL testing.

The following modules on the F28377D-SEP device were active during the SEL testing

• CPU1
  • Executing from Flash, exercising below peripherals
  • PWM: ePWM1-ePWM12 running at 400kHz output on GPIO
  • eCAP1-6 enabled
  • XCLKOUT on GPIO
  • ADC: All 4 ADC running continuous conversions
  • DAC: All 3 DACs outputting a voltage up/down at 150kHz
  • CMPSS: All active with internal ramp generator running
  • McBSP clocked at 1MHz and active
  • I2C running with 100kHz output clock
  • USB active
  • DCAN active
  • SCI running loopback at 115.2kbps
  • SPI running at 4Mbps
  • CLA in use, executing tasks
  • DMA transferring data
• CPU2
  • Executing from Flash, running various FPU/TMU/VCU instructions
  • CLA in use, executing tasks
  • DMA transferring data

All equipment except the Saleae Logic Pro 16 and NI PXIe 4135 were controlled and monitored using a custom-developed LabVIEW™ program (PXI-RadTest) running on a HP-Z4 desktop computer. The computer communicates with the PXI chassis via an MXI controller and NI PXIe-8381 remote control module. The Logic Analyzers and SMU were controlled via laptop PCs

Equipment Settings and Parameters Used During the SEE Testing of the F28377D-SEP shows the connections, limits, and compliance values used during the testing. Figure 6-1 shows a block diagram of the setup used for SEE testing of the F28377D-SEP.

All boards used for SEE testing were fully checked for functionality. Dry runs were also performed to verify that the test system was stable under all bias and load conditions prior to being taken to the TAMU facility. During the heavy-ion testing, the LabVIEW control program powered up the F28377D-SEP device and set the external sourcing and monitoring functions of the external equipment. After functionality and stability was confirmed, the beam shutter was opened to expose the device to the heavy-ion beam. The shutter remained open until the target fluence was achieved (determined by external detectors and counters). During irradiation, the NI scope cards continuously monitored the signals. When the device heartbeat went undetected from the device, those events were logged as transient upsets. In all cases recovery from those transients occurred, typically via automatic device reset due to the internal watchdog or NMI functions on the device. No sudden increases in current were observed (outside of normal fluctuations) on any of the test runs and indicated that no SEL events occurred during any of the tests.

Figure 6-1 Block Diagram of the SEE Test Setup for the F28377D-SEP