SPRK066 October   2025 F28377D-SEP

 

  1.   1
  2.   F28377D-SEP Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Single-Event Effects (SEE)
  6. 3Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5Depth, Range, and LETEFF Calculation
  9. 6Test Setup and Procedures
  10. 7Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
  11. 8Single-Event Transients (SET)
    1. 8.1 GPIO Testing and Results
      1. 8.1.1 GPIO Test Setup
      2. 8.1.2 GPIO SET Analysis
      3. 8.1.3 GPIO SET Summary
    2. 8.2 ePWM Testing and Results
      1. 8.2.1 ePWM Testing Setup
      2. 8.2.2 ePWM SET Analysis
      3. 8.2.3 ePWM SET Summary
    3. 8.3 SRAM Testing and Results
      1. 8.3.1 SRAM Test Setup
      2. 8.3.2 SRAM SET Summary
    4. 8.4 Flash Memory Testing and Results
      1. 8.4.1 Flash Test Setup
      2. 8.4.2 Flash SET Summary
  12. 9Summary
  13.   A Total Ionizing Dose from SEE Experiments
  14.   B References

2 Single-Event Effects (SEE)

The primary concern for the F28377D-SEP is the robustness against the destructive single-event effects (DSEE): single-event latch-up (SEL).

SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts) [1,2]. The parasitic bipolar structure initiated by a single-event creates a high-conductance path (inducing a steady-state current that is typically orders-of-magnitude higher than the normal operating current) between power and ground that persists (is “latched”) until power is removed, the device is reset, or until the device is destroyed by the high-current state. The F28377D-SEP was tested for SEL at the maximum recommended operating conditions of 3.46V (VDDIO) and 1.26V (VDD). The flash memory of the device was programmed with code used to enable all peripherals as well as both CPU cores; and the device was placed into flash boot mode. Two GPIO outputs with a 100kHz square wave, controlled by CPU1 and CPU2 respectively, were monitored to indicate normal CPU behavior. During testing of the 3 devices, the F28377D-SEP did not exhibit any SEL with heavy-ions with LETEFF = 45MeV·cm2 /mg at flux ≈105 ions×cm2/s , fluence of ≈107 ions/cm2, and a die temperature of 125°C.

The F28377D-SEP was characterized for SET at flux of ≈104 ions/cm2, fluences of ≈106 ions/cm2, and room temperature. The device was characterized at VDDIO/VDD of 3.3V/1.2V. Heavy-ions with LETEFF of 8.5 - 45MeV·cm2/mg were used to characterize the transient performance. To see the SET results of the F28377D-SEP, please refer to Single-Event Transients (SET).