SPRADP4 February   2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1 , AM67 , AM68A , AM69A , DRA821U , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1 , TDA4VP-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2MCAN Features
  6. 3MCAN Software Configuration
    1. 3.1 Filter Configuration
    2. 3.2 Transmitter Delay Compensation
    3. 3.3 MCAN Bit Timing Parameters
  7. 4Debug Tips to Resolve MCAN Communication Issues
    1. 4.1 Debugging the MCAN Hardware
    2. 4.2 Debugging using MCAN registers
      1. 4.2.1 MCAN Protocol Status Register
      2. 4.2.2 MCAN Error Counter Register
    3. 4.3 Understanding MCAN applications in TI SDKs
      1. 4.3.1 MCU PLUS SDK
      2. 4.3.2 Linux SDK
      3. 4.3.3 MCAL SDK
      4. 4.3.4 PDK
    4. 4.4 Other Common Issues
  8. 5Related FAQs
  9. 6Summary
  10. 7References

MCAN Protocol Status Register

The MCAN protocol status can be inferred from the PSR register.

When any CAN message transmission or reception fails, the controller updates LEC (Last Error Code) and DLEC (Data Phase Last Error Code) fields in status register (MCAN_PSR)

LEC: This field is updated when error occurs in arbitration phase in case of CAN FD message or during full message for classic CAN message.

DLEC: This field is updated when error occurs in data phase in case of CAN FD message.

LEC and DLEC fields have the following errors:

  • Stuff Error
    • Node type: Rx
    • Description: More than five equal bits in a sequence have occurred in a part of a received message where this is not allowed.
    • Check if all the nodes on the bus have same bit-rate.
  • Form Error

    • Node type: Rx
    • Description: A fixed format part of a received frame has the wrong format.
    • This can happen if the receiver node has drift in CAN functional clock momentarily or bus has interference.
  • Ack Error

    • Node Type: Tx
    • Description: The message transmitted by the MCAN module was not acknowledged by another node.
    • CAN bus needs to have more than one node (apart from the transmitting node) up and running (not in sleep or power down state).
  • Bit1 Error and Bit0 Error
    • Node Type: Tx
    • Description:
      • Bit1 Error: During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant.
      • Bit0 Error: During the transmission of a message (acknowledge bit, active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored bus value was recessive.
    • Tx and Rx lines are sampled at Sampling Point (SP) and Secondary Sampling Point (SSP) respectively have different values. Position of SSP is configurable.

    • This can happen in following cases:

      • Check if tx and rx pins are configured properly. These pins need to be pulled high by default, that is, when the bus is idle (when no communication is going on).
      • Check if CAN transceiver is enabled.
      • For LEC:
        • If this configured, then SP is too large for given node.
        • Segment after SP (TSEG2) needs to be large enough to compensate for Transceiver Delay.
      • For DLEC:
        • Configured Transceiver Delay Compensation value is less or more than required.

  • CRC Error
    • Node type: Rx

    • Description: The CRC check sum of a received message was incorrect. The CRC of an incoming message does not match with the CRC calculated from the received data.

    • This can happen if receiver node has drift in CAN functional clock momentarily or bus has interference.