ZHCSCA8A March 2014 – April 2019 TPS65286
PRODUCTION DATA.
The peak inductor current limit trip of buck converter is set by an external resistor at the RLIM terminal. The peak inductor current threshold for over current protection can be calculated by Equation 6.
Figure 27. Current-Limit Threshold vs RLIM The device is protected from over current conditions by cycle-by-cycle current limiting on both the high-side MOSFET and the low-side MOSFET.
High-side MOSFET over current protection:
The device implements current mode control which uses the COMP terminal voltage to control the turn off of the high-side MOSFET and the turn on of the low-side MOSFET on a cycle-by-cycle basis. Each cycle the switch current and the current reference generated by the COMP terminal voltage are compared, the peak switch current intersects the current reference and the high-side switch is turned off.
Low-side MOSFET over current protection:
While the low-side MOSFET is turned on, its conduction current is monitored by the internal circuitry. During normal operation, the low-side MOSFET sources current to the load. At the end of every clock cycle, the low-side MOSFET sourcing current is compared to the internally sourcing current limit threshold. If the low-side sourcing current is exceeded, the high-side MOSFET is turned off and the low-side MOSFET is forced on for the next cycle. The high-side MOSFET is turned on again when the low-side current is below the low-side sourcing current limit threshold at the start of a cycle.
The low-side MOSFET may also sink current from the load. If the low-side sinking current limit is exceeded, the low-side MOSFET is turned off immediately for the rest of that clock cycle. In this scenario both MOSFETs are off until the next cycle. Furthermore, if an output overload condition (as measured by the COMP terminal voltage) has lasted for more than the hiccup wait time which is programmed for 256 switching cycles, the device will shut down and recover after the hiccup time of 8192 cycles. The hiccup mode helps to reduce the device power dissipation under over current conditions.
Figure 28. DCDC Over-Current Protection