ZHCSDC1D September 2013 – October 2018 TAS5766M , TAS5768M
PRODUCTION DATA.
| Dec | Hex | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|---|---|---|---|---|---|---|---|---|---|
| 40 | 0x28 | RSV | RSV | AFMT1 | AFMT0 | RSV | RSV | ALEN1 | ALEN0 |
| Reset Value | 0 | 0 | 1 | 0 | |||||
| RSV | Reserved | ||||||||
| Reserved. Do not access. | |||||||||
| AFMT[1:0] | I2S Data Format | ||||||||
| These bits control both input and output audio interface formats for DAC operation. | |||||||||
| Default value: 00 | |||||||||
| 00: I2S | |||||||||
| 01: DSP | |||||||||
| 10: RTJ | |||||||||
| 11: LTJ | |||||||||
| ALEN[1:0] | I2S Word Length | ||||||||
| These bits control both input and output audio interface sample word lengths for DAC operation. | |||||||||
| Default value: 10 | |||||||||
| 00: 16 bits | |||||||||
| 01: 20 bits | |||||||||
| 10: 24 bits | |||||||||
| 11: 32 bits | |||||||||