ZHCSHX0C March 2018 – January 2023 DS90UB936-Q1
PRODUCTION DATA
Input jitter tolerance is the ability of the Clock and Data Recovery (CDR) Phase-Lock Loop ( PLL) of the receiver to track and recover the incoming serial data stream. Jitter tolerance at a specific frequency is the maximum jitter permissible before data errors occur. The following shows the allowable total jitter of the receiver inputs and must be less than the values in the chart.
INTERFACE | JITTER AMPLITUDE (UI p-p) | FREQUENCY (MHz) (1) | ||
---|---|---|---|---|
FPD-Link III | A1 | A2 | ƒ1 | ƒ2 |
1 | 0.4 | FPD3_PCLK / 80 | FPD3_PCLK / 15 |