產品詳細資料

Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Current sense Amplifier, Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 9 Vs ABS (max) (V) 102 Features Current sense Amplifier, Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125 TI functional safety category Functional Safety Quality-Managed
WQFN (RTA) 40 36 mm² 6 x 6
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional triple low-side current shunt amplifiers
  • Functional Safety Quality-Managed
    • Documentation available to aid IEC 61800-5-2 functional safety system design
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)
  • 9 to 100-V, Triple half-bridge gate driver
    • Optional triple low-side current shunt amplifiers
  • Functional Safety Quality-Managed
    • Documentation available to aid IEC 61800-5-2 functional safety system design
  • Smart gate drive architecture
    • Adjustable slew rate control for EMI performance
    • VGS handshake and minimum dead-time insertion to prevent shoot-through
    • 50-mA to 1-A peak source current
    • 100-mA to 2-A peak sink current
    • dV/dt mitigation through strong pulldown
  • Integrated gate driver power supplies
    • High-side doubler charge pump For 100% PWM duty cycle control
    • Low-side linear regulator
  • Integrated triple current shunt amplifiers
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • 6x, 3x, 1x, and independent PWM modes
    • Supports 120° sensored operation
  • SPI or hardware interface available
  • Low-power sleep mode (20 µA at VVM = 48-V)
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Gate drive supply undervoltage (GDUV)
    • MOSFET VDS overcurrent protection (OCP)
    • MOSFET shoot-through prevention
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)

The DRV835xF family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes.

The DRV835xF uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.

The DRV835xF family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes.

The DRV835xF uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGS monitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events

Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.

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重要文件 類型 標題 格式選項 日期
* Data sheet DRV835xF 100-V Three-Phase Smart Gate Driver datasheet (Rev. B) PDF | HTML 2021年 8月 27日
Application brief 人形機器人的馬達控制 PDF | HTML 2025年 2月 5日
Application note Relating Payload to Brushless DC Motor Driver Specifications PDF | HTML 2024年 12月 2日
Technical article How motor drive innovations are helping solve robotic movement design challenges PDF | HTML 2024年 1月 5日
Application note System Design Considerations for High-Power Motor Driver Applications PDF | HTML 2021年 6月 22日
Functional safety information Design Smaller Safe Torque Off (STO) Systems Using 3-Phase Smart Gate Drivers PDF | HTML 2021年 3月 4日
Analog Design Journal Implementing STO functionality w/ diagnostic and monitoring for ind. motor drive 2019年 9月 30日

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開發板

DRV8353RH-EVM — DRV8353RH 評估模組、三相無刷 DC 智慧型閘極驅動器

DRV8353RH-EVM 是基於 DRV8353RH 閘極驅動器和 CSD19532Q5B NexFET™ MOSFET 的 15A、3 相位無刷 DC 驅動級。

此模組具備獨立 DC 匯流排和相位電壓感測,以及獨立低壓側電流分流放大器,因此此評估模組最適合用於無感測器 BLDC 演算法。  模組透過整合式 0.35A 降壓穩壓器供應 MCU 3.3V 電源。  此驅動平台具備 IDRIVE 配置、故障接腳,並可透過由特定電阻值構成的簡易可配置硬體介面進行短路、過熱、擊穿和欠電壓保護。

使用指南: PDF
開發板

DRV8353RS-EVM — DRV8353RS 評估模組、三相無刷 DC 智慧型閘極驅動器 

DRV8353RS-EVM 是基於 DRV8353RS 閘極驅動器和 CSD19532Q5B NexFET™ MOSFET 的 15A、三相無刷直流驅動級。

此模組具備獨立 DC 匯流排和相位電壓感測,以及獨立低壓側電流分流放大器,因此此評估模組最適合用於無感測器 BLDC 演算法。  模組透過整合式 0.35A 降壓穩壓器供應 MCU 3.3V 電源。  驅動平台具備 IDRIVE 配置,故障接腳,並可透過可配置的 SPI 保護短路,過熱,直通與欠電壓情況。

使用指南: PDF
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MSP-MOTOR-CONTROL MSP firmware solutions for motor control

MSP Motor Control is a collection of software, tools and examples to spin motors in 30 minutes or less with MSPM0 Arm® Cortex® M0+ MCUs and popular motor driver solutions.

MSP Motor Control provides examples for supported hardware kits to spin brushed, stepper, and three-phase motors with sensored (...)

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