計算工具
BLDC-MAX-QG-MOSFET-CALCULATOR — Calculate the maximum QG MOSFET for your motor driver
Calculate the maximum QG MOSFET that can be driven based on the PWM switching frequency, algorithm type, and additional external capacitance.
DRV8343-Q1
- AEC-Q100 qualified for automotive applications
- Temperature grade 1: –40°C ≤ TA ≤ 125°C
- Three independent half-bridge gate driver
- Dedicated source (SHx) and drain (DLx) pins to support independent MOSFET control
- Drives 3 high-side and 3 low-side N-channel MOSFETs (NMOS)
- Smart gate drive architecture
- Adjustable slew rate control
- 1.5-mA to 1-A peak source current
- 3-mA to 2-A peak sink current
- Charge-pump of gate driver for 100% Duty Cycle
- 3 Integrated current sense amplifiers (CSAs)
- Adjustable gain (5, 10, 20, 40 V/V)
- Bidirectional or unidirectional support
- SPI (S) and hardware (H) interface available
- 6x, 3x, 1x, and independent PWM modes
- Supports 3.3-V, and 5-V logic inputs
- Charge pump output can be used to drive the reverse supply protection MOSFET
- Linear voltage regulator, 3.3 V, 30 mA
- Integrated protection features
- VM undervoltage lockout (UVLO)
- Charge pump undervoltage (CPUV)
- Short to battery (SHT_BAT)
- Short to ground (SHT_GND)
- MOSFET overcurrent protection (OCP)
- Gate driver fault (GDF)
- Thermal warning and shutdown (OTW/OTSD)
- Fault condition indicator (nFAULT)
The DRV8343-Q1 device is an integrated gate driver for three-phase applications. The device provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The dedicated Source and Drain pins enable the independent MOSFET control for solenoid application. The DRV8343-Q1 generates the correct gate drive voltages using an integrated charge pump sufficient for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A. The DRV8343-Q1 can operate from a single power supply and supports a wide input supply range of 5.5 to 60 V for the gate driver.
The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8343-Q1 device integrates three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage.
A low-power sleep mode is provided to achieve low quiescent current. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, phase-node short to supply and ground, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for the SPI device variant.
您可能會感興趣的類似產品
功能相同，但引腳輸出與所比較的裝置不同
功能與所比較的裝置相似
技術文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 12 設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
DRV8343H-Q1EVM — DRV8343H-Q1 車用三相馬達智慧閘極驅動器評估模組
DRV8343H-Q1EVM 評估模組是一款 6V 至 60V、20A 可高度配置的 3 相無刷 DC (BLDC) 馬達驅動與控制評估平台，專為 12V 至 24V 車用系統設計，採用 DRV8343H-Q1 車用智慧型閘極驅動器。 EVM 具有板載逆流電池保護，穩壓 3.3V 電源 LDO、MSP430 微控制器和 CSD18540Q5B NexFET 電源 MOSFET。
使用指南: PDF
開發板
DRV8343S-Q1EVM — DRV8343S-Q1 車用三相馬達智慧閘極驅動器評估模組
DRV8343S-Q1EVM 評估模組是一款 6V 至 60V、20A 可高度配置的 3 相無刷 DC (BLDC) 馬達驅動與控制評估平台，專為 12V 至 24V 車用系統設計，採用 DRV8343S-Q1 車用智慧型閘極驅動器。 EVM 具有板載逆流電池保護，穩壓 3.3V 電源 LDO、MSP430 微控制器和 CSD18540Q5B NexFET 電源 MOSFET。
使用指南: PDF
參考設計
TIDA-060030 — 車用 12-V 至 24-V 引擎負載介面參考設計
此參考設計為具備獨立 FET 功能的 3 相 1/2 全橋馬達驅動解決方案，可介接汽油與柴油引擎平台 (例如汽車電磁閥、雙向有刷或無刷 DC 馬達、單向有刷 DC 馬達及繼電器) 中的電磁閥負載。
在混合動力電動車問世之前，內燃機 (ICE) 將是引擎控制單元 (ECU) 的最大市場，而引擎平台可能需要多達 60 種通用輸出。此設計採用 DRV8343-Q1 馬達驅動器，每個裝置支援多達 6 個獨立負載，並可針對任何負載輸出配置架構進行配置。
此參考設計具備 4 個不同的輸出，展示了 DRV8343-Q1 (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HTQFP (PHP) | 48 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點