One event
output per channel + one combined event output for all the
channels routed to the MCU event fabric.
Total of 5+1
event outputs. Only the combined event has a standard
complement of MIS/RIS/IMASK/ISET/ICLR/IMCLR/IMSET registers.
RIS is automatically cleared when reading capture value or
writing compare value.
The
combined event also includes a timer overflow event.
This event is asserted when time overflows and
remain asserted till 4sec.
The event set
within RIS can be cleared via ICLR, and also when any of the
following occurs:
Reading from the capture register (this only occurs
if the channel is in capture mode or disarmed).
Writing to the compare register.
Arming the channel in capture mode via writing
CHnCFG.MODE bit to 1.
Arming the channel in compare mode via writing
ARMSETn bit to 1, provided
CHnCFG.MODE bit as 0.
Trigger past
event
A
compare event triggers immediately if 0 <=
TIME-CMP < 2^22, in other words if the compare
time is now or up to 1.048576s in the past for LRF
channel, and up to 4.294s in the past for system and
backup channels (if the backup channel is configured
to 1 µs resolution).
SYSTIM event inputs:
One event input per
channel.
Can be configured to
capture on a configurable condition (rising edge, falling edge and
both edges). This also generates a capture event output on the same
channel, setting the RIS interrupt flag.
The SYSTIM.CHnCFG[2:1] INP bit field can be used to
configure the capture condition.
If SYSTIM.CHnCFG[2:1] INP bit field = 0 then
capture on the rising edge.
If SYSTIM.CHnCFG[2:1] INP bit field = 1 then
capture on the falling edge.
If SYSTIM.CHnCFG[2:1] INP bit field = 2 then
capture on both rising and falling edges.
Software must arm a
channel for capture, and a capture event automatically disarms the
channel.