SLUSFR7 August   2025 BQ24810

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting AC_PLUG_EXIT_DEG in Battery Only Boost Mode
        2. 6.4.3.2 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ChargeOption4 Register
      7. 6.6.7  ProchotOption0 Register
      8. 6.6.8  ProchotOption1 Register
      9. 6.6.9  ProchotStatus Register
      10. 6.6.10 Charge Current Register
      11. 6.6.11 Charge Voltage Register
      12. 6.6.12 Discharge Current Register
      13. 6.6.13 Minimum System Voltage Register
      14. 6.6.14 Input Current Register
      15. 6.6.15 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does Not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
        1. 7.4.2.1 Layout Consideration of Current Path
        2. 7.4.2.2 Layout Consideration of Short Circuit Protection
        3. 7.4.2.3 Layout Consideration for Short Circuit Protection
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RUY|28
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.3.1.2 Adapter Detect and ACOK Output

An external resistor divider attenuates the adapter voltage before it goes to ACDET. If the battery boost mode is not used, the adapter detect threshold must be programmed to a value greater than the maximum battery voltage, but lower than the minimum allowed adapter voltage. If the battery only boost mode is used, the adapter detect threshold must instead be programmed to a value that is higher than the system regulation voltage programmed in REG0x38[5] and REG0x3E. When ACDET is above 0.6 V, all bias circuits are enabled.

The open drain ACOK output is pulled to external rail under the following conditions:

  • VUVLO < VVCC < VACOV
  • VACDET > 2.4 V
  • VVCC – VSRN > VSLEEP

ACOK HIGH indicates adapter is detected, or adapter present. The REG0x37[11] tracks the status of ACOK pin. ACOK deglitch time is 150 ms at the first time adapter plug-in if REG0x37[12] has not been overwritten since power-on reset. Once the register has been written to, and for all connections after the first connection, the value set by REG0x37[12] (150 ms or 1.3 sec) is used. Since the POR default of this register is 1.3 sec, if it is not overwritten, the first adapter plugin will have an ACOK deglitch time of 150 ms and all subsequent plugins will have an ACOK deglitch time of 1.3 sec.