SLUSFR7 August   2025 BQ24810

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting AC_PLUG_EXIT_DEG in Battery Only Boost Mode
        2. 6.4.3.2 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ChargeOption4 Register
      7. 6.6.7  ProchotOption0 Register
      8. 6.6.8  ProchotOption1 Register
      9. 6.6.9  ProchotStatus Register
      10. 6.6.10 Charge Current Register
      11. 6.6.11 Charge Voltage Register
      12. 6.6.12 Discharge Current Register
      13. 6.6.13 Minimum System Voltage Register
      14. 6.6.14 Input Current Register
      15. 6.6.15 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does Not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
        1. 7.4.2.1 Layout Consideration of Current Path
        2. 7.4.2.2 Layout Consideration of Short Circuit Protection
        3. 7.4.2.3 Layout Consideration for Short Circuit Protection
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RUY|28
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.3.3.2 High Accuracy Power Sense Amplifier (PMON)

The BQ24810 device monitors the power used by the system by adding the power discharged from the battery to the power pulled from the adapter. The PMON pin is a current source with output current proportional to system power. The PMON output current is calculated in Equation 1. APMON is the ratio of PMON pin output current to system power. It can be set in REG0x3B[9] with default 1 µA/W (REG0x3B[9] = 1) for 10-mΩ RAC and RSR sense resistors. This gain scales with the value of the sense resistors used so that 20-mΩ RAC and RSR instead have a gain of 2 µA/W with the same setting (REG0x3B[9] = 1).

Equation 1. IPMON = APMON (VIN x IIN + VBAT x IBAT) ; IBAT > 0 during discharge; IBAT < 0 during charge

The BQ24810 device allows an input sense resistor that is 2x or 1/2x of charge sense resistor by setting REG0x3B[13:12] to 01 or 10, respectively. With REG0x3B[13:12] set to 01, the current measurement across RSR is internally doubled so that a 20-mΩ RAC and 10-mΩ RSR will have the same output at the PMON pin as a 20-mΩ RAC and 20-mΩ RSR will have with REG0x3B[13:12] set to 00. With REG0x3B[13:12] set to 10, the current measurement across RAC is doubled instead. APMON as a function of RAC, RSR, REG0x3B[9] and REG0x3B[13:12] is summarized in Table 6-1. The REG0x3B[13:12] sense ratio must be set as shown in the table for each RAC and RSR combination. The REG0x3B[9] PMON gain may be set to either 0 or 1. The resultant APMON for each setting is shown.

Table 6-1 PMON Output Current Gain by Setting
RACRSRREG0x3B[13:12]
RAC and RSR Ratio		REG0x3B[9]
PMON Gain		APMON
2.5 mΩ 5 mΩ 10 = RAC and RSR 1:2 0 = 0.25 µA/W for 10 mΩ 0.125 µA/W
2.5 mΩ 5 mΩ 10 = RAC and RSR 1:2 1 = 1 µA/W for 10 mΩ 0.5 µA/W
5 mΩ5 mΩ00 = RAC and RSR 1:10 = 0.25 µA/W for 10 mΩ0.125 µA/W
5 mΩ5 mΩ00 = RAC and RSR 1:11 = 1 µA/W for 10 mΩ0.5 µA/W
10 mΩ5 mΩ01 = RAC and RSR 2:10 = 0.25 µA/W for 10 mΩ0.25 µA/W
10 mΩ5 mΩ01 = RAC and RSR 2:11 = 1 µA/W for 10 mΩ1 µA/W
5 mΩ10 mΩ10 = RAC and RSR 1:20 = 0.25 µA/W for 10 mΩ0.25 µA/W
5 mΩ10 mΩ10 = RAC and RSR 1:21 = 1 µA/W for 10 mΩ1 µA/W
10 mΩ10 mΩ00 = RAC and RSR 1:10 = 0.25 µA/W for 10 mΩ0.25 µA/W
10 mΩ10 mΩ00 = RAC and RSR 1:11 = 1 µA/W for 10 mΩ1 µA/W
20 mΩ10 mΩ01 = RAC and RSR 2:10 = 0.25 µA/W for 10 mΩ0.5 µA/W
20 mΩ10 mΩ01 = RAC and RSR 2:11 = 1 µA/W for 10 mΩ2 µA/W
10 mΩ20 mΩ10 = RAC and RSR 1:20 = 0.25 µA/W for 10 mΩ0.5 µA/W
10 mΩ20 mΩ10 = RAC and RSR 1:21 = 1 µA/W for 10 mΩ2 µA/W
20 mΩ20 mΩ00 = RAC and RSR 1:10 = 0.25 µA/W for 10 mΩ0.5 µA/W
20 mΩ20 mΩ00 = RAC and RSR 1:11 = 1 µA/W for 10 mΩ2 µA/W

A resistor is connected on the PMON pin to convert output current to output voltage with desired scaling. A maximum 100-pF capacitor to GND is recommended as close as possible to the PMON pin for decoupling high-frequency noise. An additional RC filter is optional, if additional filtering is desired. Note that adding filtering also adds additional response delay. The PMON output voltage is clamped to 3.3 V.