ADS5282 8-Channel, 12-bit, 65MSPS Analog-to-Digital Converter | 德州仪器 TI.com.cn

ADS5282 (正在供货) 8-Channel, 12-bit, 65MSPS Analog-to-Digital Converter

8-Channel, 12-bit, 65MSPS Analog-to-Digital Converter - ADS5282
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描述

The ADS528x is a family of high-performance, low-power, octal channel analog-to-digital converters (ADCs). Available in either a 9mm × 9mm QFN package or an HTQFP-80 package, with serialized low-voltage differential signaling (LVDS) outputs and a wide variety of programmable features, the ADS528x is highly customizable for a diversity of applications and offers an unprecedented level of system integration. An application note, XAPP774 (available at www.xilinx.com), describes how to interface the serial LVDS outputs of TI&3146;s ADCs to Xilinx field-programmable gate arrays (FPGAs). The ADS528x family is specified over the industrial temperature range of –40°C to +85°C.

特性

  • Speed and Resolution Grades:
    • ADS5281: 12-bit, 50MSPS
    • ADS5282: 12-bit, 65MSPS
  • Power Dissipation:
    • 48mW/Channel at 30MSPS
    • 55mW/Channel at 40MSPS
    • 64mW/Channel at 50MSPS
    • 77mW/Channel at 65MSPS
  • 70dBFS SNR at 10MHz IF
  • Analog Input Full-Scale Range: 2VPP
  • Low-Frequency Noise Suppression Mode
  • 6dB Overload Recovery In One Clock
  • External and Internal (Trimmed) Reference
  • 3.3V Analog Supply, 1.8V Digital Supply
  • Single-Ended or Differential Clock:
    • Clock Duty Cycle Correction Circuit (DCC)
  • Programmable Digital Gain: 0dB to 12dB
  • Serialized DDR LVDS Output
  • Programmable LVDS Current Drive, Internal Termination
  • Test Patterns for Enabling Output Capture
  • Straight Offset Binary or Two’s Complement Output
  • Package Options:
    • 9mm × 9mm QFN-64
    • HTQFP-80 PowerPAD Compatible with ADS527x Family

参数

与其它产品相比 高速 ADCs (>10MSPS) 邮件 下载到电子表格中
Part number 立即下单 Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADS5282 立即下单 65     Low Power     12     8     70     11.3     85     616     2     Parallel LVDS     -40 to 85     520     No     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
ADS5281 立即下单 50     Low Power     12     8     70     11.3     85     512     2     Parallel LVDS     -40 to 85     520     No     HTQFP | 80
VQFN | 64    
80HTQFP: 196 mm2: 14 x 14 (HTQFP | 80)
64VQFN: 81 mm2: 9 x 9 (VQFN | 64)    
Catalog     Pipeline    
ADS5287 无样片 65     Low Power     10     8     61.7     9.94     85     616     2     Serial LVDS     -40 to 85     520     No     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline