ADS1282 用于地震监测和能源勘探且具有 PGA 的超高分辨率 4kSPS 2 通道 Δ-Σ ADC | 德州仪器 TI.com.cn

ADS1282
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用于地震监测和能源勘探且具有 PGA 的超高分辨率 4kSPS 2 通道 Δ-Σ ADC

用于地震监测和能源勘探且具有 PGA 的超高分辨率 4kSPS 2 通道 Δ-Σ ADC - ADS1282
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描述

The ADS1282 is an extremely high-performance, single-chip analog-to-digital converter (ADC) with an integrated, low-noise programmable gain amplifier (PGA) and two-channel input multiplexer (mux). The ADS1282 is suitable for the demanding needs of energy exploration and seismic monitoring environments.

The converter uses a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator that provides outstanding noise and linearity performance. The modulator is used either in conjunction with the on-chip digital filter, or can be bypassed for use with post processing filters.

The flexible input MUX provides an additional external input for measurement, as well as internal self-test connections. The PGA features outstanding low noise (5 nV/√Hz) and high input impedance, allowing easy interfacing to geophones and hydrophones over a wide range of gains.

The digital filter provides selectable data rates from 250 to 4000 samples per second (SPS). The high-pass filter (HPF) features an adjustable corner frequency. On-chip gain and offset scaling registers support system calibration.

The synchronization input (SYNC) can be used to synchronize the conversions of multiple ADS1282s. The SYNC input also accepts a clock input for continuous alignment of conversions from an external source.

Together, the amplifier, modulator, and filter dissipate 25 mW. The ADS1282 is available in a compact TSSOP-28 package and is fully specified from –40°C to +85°C, with a maximum operating range to +125°C.

特性

  • High Resolution:
    130-dB SNR (250 SPS)
  • High Accuracy:
    THD: –122 dB
    INL: 0.5 ppm
  • Low-Noise PGA
  • Two-Channel Input Mux
  • Inherently-Stable Modulator with Fast Responding
    Overrange Detection
  • Flexible Digital Filter:
    Sinc + FIR + IIR (Selectable)
    Linear or Minimum Phase Response
    Programmable High-Pass Filter
    Selectable FIR Data Rates: 250 SPS
    to 4 kSPS
  • Filter Bypass Option
  • Low Power Consumption: 25 mW
    Shutdown: 10 µW
  • Offset and Gain Calibration Engine
  • SYNC Input
  • Analog Supply:
    Unipolar (+5 V) or Bipolar (±2.5 V)
  • Digital Supply: 1.8 V to 3.3 V

参数

与其它产品相比 精密 ADCs (<=10MSPS) 邮件 下载到电子表格中
Part number 立即下单 Resolution (Bits) Sample rate (Max) (kSPS) Number of input channels Interface Operating temperature range (C) Package Group Approx. price (US$) Power consumption (Typ) (mW) Package size: mm2:W x L (PKG) Architecture Input type Multi-channel configuration Reference mode Features Input range (Max) (V) Input range (Min) (V) Analog voltage AVDD (Min) (V) Analog voltage AVDD (Max) (V) Digital supply (Min) (V) Digital supply (Max) (V) SNR (dB) THD (Typ) (dB) Rating
ADS1282 立即下单 31     4     2     SPI     -40 to 85     TSSOP | 28     34.50 | 1ku     25     28TSSOP: 62 mm2: 6.4 x 9.7 (TSSOP | 28)     Delta-Sigma     Differential     Multiplexed     Ext     PGA     2.5     0.039     -2.5
0    
2.5
5    
1.65     3.6     130     -122     Catalog    
ADS1281 无样片 31     4     1     SPI     -40 to 85     TSSOP | 24     31.63 | 1ku     12     24TSSOP: 34 mm2: 4.4 x 7.8 (TSSOP | 24)     Delta-Sigma     Differential         Ext         2.5     2.5     -2.5
0    
2.5
5    
1.65     3.6     130     -122     Catalog    
ADS1283 无样片 31     4     2     SPI     -40 to 85     VQFN | 24       18     24VQFN: 20 mm2: 4 x 5 (VQFN | 24)     Delta-Sigma     Differential     Multiplexed     Ext     PGA     2.5     0.039     -2.5
0    
2.5
5    
1.65     3.6     130     -122     Catalog    
ADS1284 无样片 31     4     2     SPI     -40 to 85     VQFN | 24       12     24VQFN: 20 mm2: 4 x 5 (VQFN | 24)     Delta-Sigma     Differential     Multiplexed     Ext     PGA     2.5     0.039