TDES4940

現行

適用於高解析度面板的 4K V³Link™ 至 DP/eDP 解串器

產品詳細資料

Applications Display SerDes Color depth (bpp) 30 Function Deserializer Input compatibility FPD-Link IV LVDS Output compatibility DisplayPort/eDP Features Daisy chain, Low-EMI Point-to-Point Communication, Spread-Spectrum Clock (SSC) Generation Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Catalog Operating temperature range (°C) -20 to 85
Applications Display SerDes Color depth (bpp) 30 Function Deserializer Input compatibility FPD-Link IV LVDS Output compatibility DisplayPort/eDP Features Daisy chain, Low-EMI Point-to-Point Communication, Spread-Spectrum Clock (SSC) Generation Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Catalog Operating temperature range (°C) -20 to 85
VQFNP (RUR) 88 144 mm² 12 x 12
  • DisplayPort (DP) / Embedded DisplayPort (eDP) Transmitter
    • VESA DP v1.4a/eDP v1.4b transmitter
    • HBR3/HBR2/HBR/RBR Link Bit Rates
    • Main link: 1, 2, or 4 lanes
    • Each lane up to 8.1Gbps
    • AUX CH 1Mbps
    • Hot Plug Detect (HPD)
    • Extracts aggregated video streams to local eDP display
    • Designed for 4 K @ 60 Hz video resolution
    • Stream synchronization and splitting
  • V 3Link enhanced video interface
    • 13.5/12.528/10.8/6.75/3.375 Gbps per Channel; Up to 27 Gbps over dual channels
    • Coax/STP interconnect support
    • Selectable 1, 2 channels
    • Daisy-chain and splitting
    • Adaptive equalization
  • Ultra-low latency control channel
    • Two fast-mode plus I2C up to 1 MHz (up to 3.4 MHz local bus access)
    • High-speed GPIOs
    • Supports SPI and UART pass through GPIOs
  • Compatibility
    • Integrated HDCP v1.4 with on-chip keys
    • V 3Link video and V 3Link enhanced video product families
  • Image enhancement (white balance and dithering)
  • Security and diagnostics
    • Voltage and temperature monitoring
    • BIST and pattern generation
    • CRC and error diagnostics
    • ECC on control bits
    • Unique ID for counterfeit protection
  • Advanced link robustness and EMC control
    • Spread spectrum clocking generation (SSCG)
    • Adaptive Receiver Equalization (AEQ)
  • Low power operation
    • 1.8V and 1.15V dual power supply
  • Qualifications
    • ISO 10605 and IEC 61000-4-2 ESD compliant
    • Temperature: -20°C to +85°C
  • DisplayPort (DP) / Embedded DisplayPort (eDP) Transmitter
    • VESA DP v1.4a/eDP v1.4b transmitter
    • HBR3/HBR2/HBR/RBR Link Bit Rates
    • Main link: 1, 2, or 4 lanes
    • Each lane up to 8.1Gbps
    • AUX CH 1Mbps
    • Hot Plug Detect (HPD)
    • Extracts aggregated video streams to local eDP display
    • Designed for 4 K @ 60 Hz video resolution
    • Stream synchronization and splitting
  • V 3Link enhanced video interface
    • 13.5/12.528/10.8/6.75/3.375 Gbps per Channel; Up to 27 Gbps over dual channels
    • Coax/STP interconnect support
    • Selectable 1, 2 channels
    • Daisy-chain and splitting
    • Adaptive equalization
  • Ultra-low latency control channel
    • Two fast-mode plus I2C up to 1 MHz (up to 3.4 MHz local bus access)
    • High-speed GPIOs
    • Supports SPI and UART pass through GPIOs
  • Compatibility
    • Integrated HDCP v1.4 with on-chip keys
    • V 3Link video and V 3Link enhanced video product families
  • Image enhancement (white balance and dithering)
  • Security and diagnostics
    • Voltage and temperature monitoring
    • BIST and pattern generation
    • CRC and error diagnostics
    • ECC on control bits
    • Unique ID for counterfeit protection
  • Advanced link robustness and EMC control
    • Spread spectrum clocking generation (SSCG)
    • Adaptive Receiver Equalization (AEQ)
  • Low power operation
    • 1.8V and 1.15V dual power supply
  • Qualifications
    • ISO 10605 and IEC 61000-4-2 ESD compliant
    • Temperature: -20°C to +85°C

The TDES4940 is a V 3Link Enhanced Video to DisplayPort (DP) / Embedded DisplayPort (eDP) bridge device. In conjunction with a V 3Link Enhanced Video serializer, the chipset receives a high-speed serialized interface over low-cost 50 Ω coax or STP/STQ cables. The TDES4940 is a VESA DP v1.4a/eDP v1.4b compatible device that supports advanced features such as HBR3, and SuperFrame formats. The device supports video resolutions of 4K 30-bit color and higher. The V 3Link Enhanced Video supports video and audio data transmission and full duplex control, including I2C, and GPIO data over the same link. Consolidation of video data and control over V 3Link Enhanced Video lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In compatible V 3Link mode, the device supports up to 2K resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP capable serializer.

The TDES4940 is a V 3Link Enhanced Video to DisplayPort (DP) / Embedded DisplayPort (eDP) bridge device. In conjunction with a V 3Link Enhanced Video serializer, the chipset receives a high-speed serialized interface over low-cost 50 Ω coax or STP/STQ cables. The TDES4940 is a VESA DP v1.4a/eDP v1.4b compatible device that supports advanced features such as HBR3, and SuperFrame formats. The device supports video resolutions of 4K 30-bit color and higher. The V 3Link Enhanced Video supports video and audio data transmission and full duplex control, including I2C, and GPIO data over the same link. Consolidation of video data and control over V 3Link Enhanced Video lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In compatible V 3Link mode, the device supports up to 2K resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP capable serializer.

下載 觀看有字幕稿的影片 影片
索取更多資訊

提供完整產品規格表及其他資源。立即索取

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
重要文件 類型 標題 格式選項 日期
* Data sheet TDES49404K V3Link Enhanced Video to Embedded DisplayPort Bridge Deserializer datasheet PDF | HTML 2023年 11月 16日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DS90UH984-Q1EVM — DS90UH984-Q1 FPD-Link IV 至內嵌式 displayport 橋接解串器評估模組

DS90Ux984-Q1EVM 是用於評估 DS90Ux984-Q1 FPD-Link IV 至嵌入式 DisplayPort 解串器的評估模組。  DS90Ux984-Q1 支援超高解析度,包括在 60Hz 下每像素 30 位元的 4K。輸出 DP/eDP 介面與嵌入式 DisplayPort 和 DisplayPort v1.4 相容,速度可達每通道 8.1Gbps,而 FPD-Link 介面在 FPD-Link IV 模式下支援每通道最高 13.5Gbps,或在 FPD-Link III 模式下支援每通道最高 3.675Gbps。DS90Ux984-Q1EVM 的 FPD-Link (...)
應用軟體及架構

ALP Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
支援產品和硬體

支援產品和硬體

支援軟體

ALP-PROFILE-UPDATE Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
支援產品和硬體

支援產品和硬體

模擬型號

TDES4940 IBIS Model

SNLM269.ZIP (5954 KB) - IBIS Model
lock = 需要匯出核准 (1 分鐘)
模擬型號

TDES4940 IBIS-AMI Model

SNLM270.ZIP (2793 KB) - IBIS-AMI Model
lock = 需要匯出核准 (1 分鐘)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFNP (RUR) 88 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片