DS90UH941AS-Q1

現行

具有影片檔分割和 HDCP 功能的 2K DSI 至 FPD-Link III 橋接串聯器

產品詳細資料

Applications In-vehicle Infotainment (IVI) Input compatibility MIPI DSI Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features HDCP Signal conditioning Adaptive Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
Applications In-vehicle Infotainment (IVI) Input compatibility MIPI DSI Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features HDCP Signal conditioning Adaptive Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
VQFNP (RTD) 64 81 mm² 9 x 9
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
  • Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
    • Dual DSI input ports with up to 4 data lanes each
    • Up to 1.5 Gbps per lane
    • Superframe with symmetric and asymmetric unpacking capability
    • ECC and CRC generation
    • Virtual channel capability
  • Single and dual FPD-Link III outputs
    • Single link: up to 105MHz pixel clock
    • Dual link: up to 210MHz pixel clock
  • Functional Safety-Capable

    • Documentation available to aid ISO 26262 system design

  • Symmetric and asymmetric video splitting
  • Integrated HDCP v1.4 cipher engine with on-chip key storage
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
  • Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
    • Dual DSI input ports with up to 4 data lanes each
    • Up to 1.5 Gbps per lane
    • Superframe with symmetric and asymmetric unpacking capability
    • ECC and CRC generation
    • Virtual channel capability
  • Single and dual FPD-Link III outputs
    • Single link: up to 105MHz pixel clock
    • Dual link: up to 210MHz pixel clock
  • Functional Safety-Capable

    • Documentation available to aid ISO 26262 system design

  • Symmetric and asymmetric video splitting
  • Integrated HDCP v1.4 cipher engine with on-chip key storage

The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50- Ω, single-ended coaxial cables or over 100- Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50- Ω, single-ended coaxial cables or over 100- Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet DS90UH941AS-Q1 2K DSI to FPD-Link III Bridge Serializer w/ Video Split and HDCP datasheet (Rev. B) 2021年 2月 1日
Application note Splitter Mode Operations With the DS90Ux941ASQ1 (Rev. A) PDF | HTML 2020年 10月 27日
Application note DS90UB941AS-Q1 DSI Bringup Guide PDF | HTML 2020年 7月 31日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DS90UH941AS-Q1EVM — DSI 至 FPD-Link III 橋接串聯器評估模組

DS90Ux941AS-Q1EVM (評估模組) 可將 DSI 轉換為 FPD-Link III。此套件將演示 DS90Ux941AS-Q1 的功能和操作。DS90Ux941AS-Q1 為 DSI 轉 FPD-Link III 串聯器,可搭配 DS90Ux940N-1/DS90Ux948-1 解串器使用,從 DSI 序列流取得資料,並轉換為單通道或雙通道 FPD-Link III 介面。DS90Ux941AS-Q1 序列化 MIPI DSI 輸入,支援高達 2K/3K、WUXGA 和 1080p60 及 24 位元色彩深度的影像解析度。
使用指南: PDF
應用軟體及架構

ALP Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
支援產品和硬體

支援產品和硬體

支援軟體

ALP-PROFILE-UPDATE Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
支援產品和硬體

支援產品和硬體

模擬型號

DS90UH941AS-Q1 IBIS MODEL (Rev. A)

SNLM232A.ZIP (113 KB) - IBIS Model
Gerber 檔案

DS90Ux941AS-Q1 Superframe Design Calculator

SNLC064.ZIP (52 KB)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDEP-01020 — 適用於閘道、輔助和自動化駕駛系統的汽車領域控制器參考設計

現今在路上的分散式車輛架構採用個別 ECU,缺乏處理能力與高速介面,不足以應對新興汽車架構的複雜任務與資料傳輸需求。更高階的功能需要 DMIPS、資料頻寬與電源效率的適當組合。我們 Jacinto™ 7 處理器系列中的 DRA829V 和 TDA4VM 處理器可提供這些架構所需的必要性能、電源和汽車介面。

此汽車參考設計可實現網域架構,同時展現 DRA829V 和 TDAV4M SoC 的性能。這款 8 層 PCB 設計經過最佳化,可降低成本並縮短上市時間,是評估具有全功能網域控制器電路板的 Jacinto 7 處理器的絕佳方式,同時可實現包括乙太網路、CAN-FD 和 PCIe (...)

Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFNP (RTD) 64 Ultra Librarian

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  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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