DS90UB928Q-Q1
- Qualified for Automotive Applications AEC-Q100
- Device Temperature Grade 2: 40°C to +105°C Ambient Operating Temperature Range
- Device HBM ESD Classification Level ±8 kV
- Device CDM ESD Classification Level C6
- Bidirectional Control Channel Interface with I2C Compatible Serial Control Bus
- Low EMI FPD-Link Video Output
- Supports High Definition (720p) Digital Video
- RGB888 + VS, HS, DE and I2S Audio Supported
- 5 MHz to 85 MHz Pixel Clock Support
- Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
- 4 Bidirectional GPIO Channels with 2 Dedicated Pins
- Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
- AC-Coupled STP Interconnect Up to 10 Meters
- DC-Balanced and Scrambled Data with Embedded Clock
- Adaptive Cable Equalization
- Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
- Backward Compatible Modes
The DS90UB928Q-Q1 deserializer, in conjunction with a DS90UB925Q-Q1 or DS90UB927Q-Q1 serializer, provides a solution for distribution of digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90UB928Q-Q1 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With Bidirectional Control Channel datasheet (Rev. C) | PDF | HTML | 2016/7/26 | ||
| 應用說明 | Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) | PDF | HTML | 2020/11/3 | |||
| 應用說明 | Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices | 2013/5/4 | ||||
| 應用說明 | I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) | 2013/4/26 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
DS90UB928QEVM — DS90UB928QEVM FPD-Link III 解串器評估模組
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。